Vector file question

[Tao Chen]

Hi,

I am using a vector file to generate the digital stimulus for my
simulations. I met some difficulty after Cadence upgrading to
5.10.41.500.6.

In my schematic, the digital input bus is named "in<12:0>". In old
Cadence, in the netlist generated this bus is named as "in_12",
"in_11",... "in_0". So the signal name in the vector file can be
defined as:
vname in_[11:0]

However, after upgrading, the netlist generated by new Cadence names
the bus as "in\<11\>", "in\<10\>", ... "in\<0\>". I tried to change
the signal name in the vector file as:
vname in<[11:0]>
or
vname in\<[11:0]\>

Neither of them works. Any suggestions would be appreciated!

Thanks!
Tao

 

[Riad KACED]

Hi Tao,

Would you mind to post the exact versions of your Cadence/MMSIM, i.e
post the output of the following UNIX commands:
UNIX> spectre -W
UNIX> icfb -W

The syntax "vname in<[11:0]>" Should be working fine in later versions
of IC5141/MMSIM71.
This syntax should generate inputs like in<11>, in<10> ... etc. The
"\" character is used as an excape character in the Spectre netlist
but would be read as in your .vec file.

If you are really stack and want to move forward, then the following
workaround would be helpful
1. Leave your .vec file on the old syntax, i.e in_[11:0]
2. Create your spectre netlist from ADE
3. browse to your UNIX netlist directory and run the following perl 1-
liner on your netlist (assuming input.scs)
UNIX> perl -i.bak -ne 's/(?\w+)\\<(\d+)\\&gt/$1_$2/g;' -ne print
input.scs
The above command would replace something like toto\<0\> with toto_0.
Well, if toto_0 is already a valid net in your netlist then you are in
trouble ...
You may need to tweak then. Your netlist 'input.scs' is modified in
place. A backup copy id stored into input.scs.bak though. You may run
a tkdiff to see whether the above command line missed about your file.
4. rerun your simulation without netlisting.

Again, this is a workaround that stops you being dead in the water
( Thanks for that phrase Andrew ).
You definitely need to tell us your IC5141/MMSIM versions because
those I work with are all fine WRT this issue.

Cheers,
Riad.

 

[Tao]

Hi, Riad,

Thanks for the reply. Here is the info you required:
$ spectre -W
sub-version 7.1.1.140.isr8
$ icfb -W
Sourcing local customization script for iccraftsman.
Sourcing local customization script for cadence.
sub-version 5.10.41.500.6.137

The work around that I am using now is to change the bus name from
in<12:0> to "in12,in11,...in0", and use "vname in[12:0]" in the vector
file.

Best Regards,
Tao

 

[Riad KACED]

Hi Tao,

Ask your EDA guy to get you the latest MMSIM7.1.1.205.isr12, this one
would work fine with your problem and has many other enhacments and
bug fixes, especially WRT dcmatch if you happen to run any.
I don't have 7.1.1.140.isr8 at my end, I would have tried it
otherwise. Anyhow, there is no reason going backwards.

Cheers,
Riad.

 

[Tao]

Hi, Riad,

After upgrading to MMSIM 7.1.1.205.isr12, the problem is solved. Thank
you!

Regards,
Tao

 

[Riad KACED]

Hi,

Great !

Message to Andrew (or anybody who can answer):
Do you know when and why the bus notation has been moved from the
underscore convention to the angle bracket convention ? Or is it may
be something changed in the defautt .simrc files ?

Cheers,
Riad.

 

[Marc Heise]

Riad KACED schrieb:

Hi,

Great !

Message to Andrew (or anybody who can answer):
Do you know when and why the bus notation has been moved from the
underscore convention to the angle bracket convention ? Or is it may
be something changed in the defautt .simrc files ?

Cheers,
Riad.

For 5.1.41:
http://sourcelink.cadence.com/docs/db/kdb/2009/May/11557646.html

For 6.1
11334086

Marc

 

[Riad KACED]

Hi Marc !

Thank you very much indeed for your answer.
I was looking back at my 'Cadence SourceLink Update for Riad Kaced:
5/3/2009 to 5/10/2009' and it was mention there. I should have payed
more attention !

Cheers,
Riad.

 

On Saturday, 26 September 2009 04:52:24 UTC+5:30, Tao Chen wrote:

Hi,

I am using a vector file to generate the digital stimulus for my
simulations. I met some difficulty after Cadence upgrading to
5.10.41.500.6.

In my schematic, the digital input bus is named "in<12:0>". In old
Cadence, in the netlist generated this bus is named as "in_12",
"in_11",... "in_0". So the signal name in the vector file can be
defined as:
vname in_[11:0]

However, after upgrading, the netlist generated by new Cadence names
the bus as "in\<11\>", "in\<10\>", ... "in\<0\>". I tried to change
the signal name in the vector file as:
vname in<[11:0]
or
vname in\<[11:0]\

Neither of them works. Any suggestions would be appreciated!

Thanks!
Tao

Hey I am in great need of you... Could u pls let me know on do I input the stimulus ie input bits thru Vector File... pls do help me.... I'll be waiting for ur reply.. I am working on cadence Virtuoso...
Thanks
Girish
9008665750

 

[Andrew Beckett]

On 01/29/13 16:48, ggirish1989@gmail.com wrote:

Hey I am in great need of you... Could u pls let me know on do I
input
the stimulus ie input bits thru Vector File... pls do help me.... I'll

be waiting for ur reply.. I am working on cadence Virtuoso...

Thanks
Girish
9008665750

Did you try reading the documentation? If this is for spectre or
Ultrasim, there's a chapter on this in the Ultrasim documentation.

Regards,

Andrew.