VCS command addition

[SrFPGA]

Hi,

How do i add a new command to VCS?, wherien when the simulator
encounter the specified command a specified function is executed?

Thanks in Advance

Sarma

 

[Jonathan Bromley]

On 10 Apr 2007 14:07:06 -0700, "SrFPGA"
<sarma.nedunuri@gmail.com> wrote:

How do i add a new command to VCS?, wherien when the simulator
encounter the specified command a specified function is executed?

I'm not quite sure what you mean. "When the simulator
encounter"... In the Verilog source code? Or at the
command line?

Adding new "commands" in your Verilog source code is
as simple as creating a Verilog task or function. If you
want to do something that Verilog can't do - for example,
exploring the directory structure of your file system - then
you can also create a "PLI application", a piece of C code
that is attached to a Verilog task name such as
$my_PLI_application. The DirectC functionality of VCS
(predecessor to SystemVerilog's Direct Programming
Interface) makes this rather easy to do. Using the
standard Verilog PLI is more portable, but trickier.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[Ajeetha (www.noveldv.com)]

On Apr 11, 2:07 am, "SrFPGA" <sarma.nedun...@gmail.com> wrote:

Hi,

How do i add a new command to VCS?, wherien when the simulator
encounter the specified command a specified function is executed?

Thanks in Advance

Sarma

If you mean VCS's TCL interface then look in UCLI user guide, it is a
full fledges TCL, one can add own proc if needed.

Regards
Ajeetha, CVC
www.noveldv.com