M
Mircea Gindila
Guest
Hi all,
I am trying to use a variable capacitance model in Cadence, version
4.4.5 but thee model "vccap2 avilable in analogLib is only for
hspiceS simulator and I am using spectreS simulator for my circuit. I
there anyone having a spectreS model for the vccap? As an alternative
I was also thinking of using a verilog-A or VHDL-AMS model, I assume
that should do as well. I know buiding such a model it should be
fairly simple but if sombody have used one that it works that would
save me important time.
Many thanks,
Mircea
I am trying to use a variable capacitance model in Cadence, version
4.4.5 but thee model "vccap2 avilable in analogLib is only for
hspiceS simulator and I am using spectreS simulator for my circuit. I
there anyone having a spectreS model for the vccap? As an alternative
I was also thinking of using a verilog-A or VHDL-AMS model, I assume
that should do as well. I know buiding such a model it should be
fairly simple but if sombody have used one that it works that would
save me important time.
Many thanks,
Mircea