using Zero Order Hold in Cadence

[Manivannan]

Hai all,

i tried using the Q'ZOH() option of VHDL-AMS in Cadence , but it did
not work out, gave a message that the feature is not supported. Is
there any other way of doing this in VHDL-AMS itself, rather than
doing ZOH alone in verilog and then combining with the other codes

thanks
Manivannan