Using packages in a hierarchical design

S

Shannon

Guest
Don't you just love all these softball questions from me?

Ok, I did my search through comp.lang.vhdl and didn't find what I'm
looking for.

I'm using my own package in some of my lower-level modules (entity/
architecture pairs).
When I stitch everything together in my top-level module then Quartus
complains that I've got the package defined in more than one
location. Ok, I comment out the lower-level ones and everything is
fine.

However, now when I edit my lower-level modules I have to keep
uncomment/re-comment the package definition. There has GOT to be an
easier (and more correct) method.

Is there a way to "compile" the package separately so that I only have
to "USE work.mypkg.all" in each of my lower-level modules?
 
Shannon <sgomes@sbcglobal.net> writes:

Don't you just love all these softball questions from me?

Ok, I did my search through comp.lang.vhdl and didn't find what I'm
looking for.

I'm using my own package in some of my lower-level modules (entity/
architecture pairs).
When I stitch everything together in my top-level module then Quartus
complains that I've got the package defined in more than one
location. Ok, I comment out the lower-level ones and everything is
fine.

However, now when I edit my lower-level modules I have to keep
uncomment/re-comment the package definition. There has GOT to be an
easier (and more correct) method.

Is there a way to "compile" the package separately so that I only have
to "USE work.mypkg.all" in each of my lower-level modules?
So long as you use the same work library for all your compilations,
you only have to compile your package once. Either put it in it's own
file, and include that file in the project, or have it once in once of
your other files.

Does that help?

Cheers,
Martin

--
martin.j.thompson@trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html
 
On Sep 11, 12:49 am, Shannon <sgo...@sbcglobal.net> wrote:
Don't you just love all these softball questions from me?

Ok, I did my search through comp.lang.vhdl and didn't find what I'm
looking for.

I'm using my own package in some of my lower-level modules (entity/
architecture pairs).
When I stitch everything together in my top-level module then Quartus
complains that I've got the package defined in more than one
location. Ok, I comment out the lower-level ones and everything is
fine.

However, now when I edit my lower-level modules I have to keep
uncomment/re-comment the package definition. There has GOT to be an
easier (and more correct) method.

Is there a way to "compile" the package separately so that I only have
to "USE work.mypkg.all" in each of my lower-level modules?
Whatever file it is that contains "mypkg" simply needs to be compiled
before any file where it is referenced (i.e where you say 'use
work.mypkg.all'). But the error that you say Quartus is reporting is
that the package is defined in more than one place....maybe hunt that
down too since there must be at least two places where "mypkg" is
defined.

KJ
 
Perhaps the problem I'm having is not VHDL but instead I'm not driving
Quartus correctly.

I've tried to put the package into it's own project and compile it by
itself. I get the error: "Error: Top-level design entity "mypkg" is
undefined".

Is there a syntax to putting a package by itself? Here is the
complete text of what I tried to compile:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

PACKAGE mypkg IS

TYPE table_array IS ARRAY (0 to 39) of STD_LOGIC_VECTOR(7 DOWNTO 0);
TYPE trigger_mode IS (Internal, External, CW);

END mypkg;

KJ: I think you might have mis-read my original post. Thanks for
your answer anyway though. ALL help is appreciated.

Shannon
 
On Sep 11, 9:09 am, Shannon <sgo...@sbcglobal.net> wrote:
Perhaps the problem I'm having is not VHDL but instead I'm not driving
Quartus correctly.

I've tried to put the package into it's own project and compile it by
itself. I get the error: "Error: Top-level design entity "mypkg" is
undefined".
That's because 'mypkg' is a package not an entity. You can only
synthesize (i.e. run through Quartus) a top level entity.

Is there a syntax to putting a package by itself?
No.

Here is the
complete text of what I tried to compile:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

PACKAGE mypkg IS

TYPE table_array IS ARRAY (0 to 39) of STD_LOGIC_VECTOR(7 DOWNTO 0);
TYPE trigger_mode IS (Internal, External, CW);

END mypkg;

KJ: I think you might have mis-read my original post. Thanks for
your answer anyway though. ALL help is appreciated.
Could be a misread but the thing that caught my eye was your statement
"When I stitch everything together in my top-level module then
Quartus
complains that I've got the package defined in more than one
location"

So my question is, does Quartus say where these multiple locations are
that define the one package? That might be a clue to
follow....finding those 'multiple locations'.

KJ
 
On Sep 11, 6:43 am, KJ <Kevin.Jenni...@Unisys.com> wrote:
On Sep 11, 9:09 am, Shannon <sgo...@sbcglobal.net> wrote:> Perhaps the problem I'm having is not VHDL but instead I'm not driving
Quartus correctly.

I've tried to put the package into it's own project and compile it by
itself. I get the error: "Error: Top-level design entity "mypkg" is
undefined".

That's because 'mypkg' is a package not an entity. You can only
synthesize (i.e. run through Quartus) a top level entity.



Is there a syntax to putting a package by itself?

No.

Here is the
complete text of what I tried to compile:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

PACKAGE mypkg IS

TYPE table_array IS ARRAY (0 to 39) of STD_LOGIC_VECTOR(7 DOWNTO 0);
TYPE trigger_mode IS (Internal, External, CW);

END mypkg;

KJ: I think you might have mis-read my original post. Thanks for
your answer anyway though. ALL help is appreciated.

Could be a misread but the thing that caught my eye was your statement
"When I stitch everything together in my top-level module then
Quartus
complains that I've got the package defined in more than one
location"

So my question is, does Quartus say where these multiple locations are
that define the one package? That might be a clue to
follow....finding those 'multiple locations'.

KJ
Yes, it's quite clear where all the multiple locations are. I put
them there! hehehe... As I said in the original post, "Ok, I comment
out the lower-level ones and everything is
fine. "

But that isn't where I'm having the problem. Now as part of debugging
my code I continually go and edit/compile/simulate each of the lower-
level modules by themselves. In that case, they can't see the package
so I have to un-comment where I have the package defined in that
file. Then I can compile and everything is fine. But to stitch it
back together with the top level, I have to re-comment the package
definition in the lower level file. I'm sensing that my description
of things is not coming across... perhaps a pseudo-code example would
work:

Package mypkg is
....
end mypkg

entity top-level is
....
end top-level

architecture rtl of top-level is
....
(pile of component instances)
....
end rtl

__________________________________________-
(in another file...)

-- package mypkg IS
-- definition (this whole block is commented out
-- end mypkg

entity component1 IS
....
end component1

arch
....
end

_______________________________________
(in another file....)


-- package mypkg IS
-- definition (this whole block is commented out
-- end mypkg

entity component2 IS
....
end component1

arch
....
end

____________________________________

etc.....

Now when I want to work on component2 let's say. I uncomment the
package definition and edit/compile and get things right (this time
for sure! hehehe). Then to compile the top-level entity I have to
remember to go back and re-comment the package definition in
component2.

I hope that makes it a bit clearer. I'm just looking for a nice way
to maybe reference the package externally in each of the lower-level
entities so that I don't have to do this comment/uncomment cycle.

Thanks so much for any help you can give,

Shannon
 
On Sep 11, 7:17 am, Shannon <sgo...@sbcglobal.net> wrote:
On Sep 11, 6:43 am, KJ <Kevin.Jenni...@Unisys.com> wrote:



On Sep 11, 9:09 am, Shannon <sgo...@sbcglobal.net> wrote:> Perhaps the problem I'm having is not VHDL but instead I'm not driving
Quartus correctly.

I've tried to put the package into it's own project and compile it by
itself. I get the error: "Error: Top-level design entity "mypkg" is
undefined".

That's because 'mypkg' is a package not an entity. You can only
synthesize (i.e. run through Quartus) a top level entity.

Is there a syntax to putting a package by itself?

No.

Here is the
complete text of what I tried to compile:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

PACKAGE mypkg IS

TYPE table_array IS ARRAY (0 to 39) of STD_LOGIC_VECTOR(7 DOWNTO 0);
TYPE trigger_mode IS (Internal, External, CW);

END mypkg;

KJ: I think you might have mis-read my original post. Thanks for
your answer anyway though. ALL help is appreciated.

Could be a misread but the thing that caught my eye was your statement
"When I stitch everything together in my top-level module then
Quartus
complains that I've got the package defined in more than one
location"

So my question is, does Quartus say where these multiple locations are
that define the one package? That might be a clue to
follow....finding those 'multiple locations'.

KJ

Yes, it's quite clear where all the multiple locations are. I put
them there! hehehe... As I said in the original post, "Ok, I comment
out the lower-level ones and everything is
fine. "

But that isn't where I'm having the problem. Now as part of debugging
my code I continually go and edit/compile/simulate each of the lower-
level modules by themselves. In that case, they can't see the package
so I have to un-comment where I have the package defined in that
file. Then I can compile and everything is fine. But to stitch it
back together with the top level, I have to re-comment the package
definition in the lower level file. I'm sensing that my description
of things is not coming across... perhaps a pseudo-code example would
work:

Package mypkg is
...
end mypkg

entity top-level is
...
end top-level

architecture rtl of top-level is
...
(pile of component instances)
...
end rtl

__________________________________________-
(in another file...)

-- package mypkg IS
-- definition (this whole block is commented out
-- end mypkg

entity component1 IS
...
end component1

arch
...
end

_______________________________________
(in another file....)

-- package mypkg IS
-- definition (this whole block is commented out
-- end mypkg

entity component2 IS
...
end component1

arch
...
end

____________________________________

etc.....

Now when I want to work on component2 let's say. I uncomment the
package definition and edit/compile and get things right (this time
for sure! hehehe). Then to compile the top-level entity I have to
remember to go back and re-comment the package definition in
component2.

I hope that makes it a bit clearer. I'm just looking for a nice way
to maybe reference the package externally in each of the lower-level
entities so that I don't have to do this comment/uncomment cycle.

Thanks so much for any help you can give,

Shannon
I suspect what Martin mentioned is what I have to do. Somehow there
must be a way in Quartus just to include a file with the package
defined. Then when I do a compile it somehow gets attached and
compiled with the rest of it. I really suspect that I'm just not
driving Quartus the way I'm supposed to.

Shannon
 
KJ is probably right in that you apparently have defined the same
package in multiple files (along with different entity/architectures)?

If you define the package in only one file, and include that file with
the rest of your entity/architecture files in your project, it should
work.

It is possible to compile a package all by itself, but not as a
project. Look into how to create a library in quartus, instead of a
project. Then if you compile that package by itself into a library, it
should work. Of course, you would have to reference the package with
"use library_name.pkg_name.all;", instead of "use work.pkg_name.all;"
in your entities/architectures.

Andy
 
On Sep 11, 7:22 am, Shannon <sgo...@sbcglobal.net> wrote:
On Sep 11, 7:17 am, Shannon <sgo...@sbcglobal.net> wrote:



On Sep 11, 6:43 am, KJ <Kevin.Jenni...@Unisys.com> wrote:

On Sep 11, 9:09 am, Shannon <sgo...@sbcglobal.net> wrote:> Perhaps the problem I'm having is not VHDL but instead I'm not driving
Quartus correctly.

I've tried to put the package into it's own project and compile it by
itself. I get the error: "Error: Top-level design entity "mypkg" is
undefined".

That's because 'mypkg' is a package not an entity. You can only
synthesize (i.e. run through Quartus) a top level entity.

Is there a syntax to putting a package by itself?

No.

Here is the
complete text of what I tried to compile:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

PACKAGE mypkg IS

TYPE table_array IS ARRAY (0 to 39) of STD_LOGIC_VECTOR(7 DOWNTO 0);
TYPE trigger_mode IS (Internal, External, CW);

END mypkg;

KJ: I think you might have mis-read my original post. Thanks for
your answer anyway though. ALL help is appreciated.

Could be a misread but the thing that caught my eye was your statement
"When I stitch everything together in my top-level module then
Quartus
complains that I've got the package defined in more than one
location"

So my question is, does Quartus say where these multiple locations are
that define the one package? That might be a clue to
follow....finding those 'multiple locations'.

KJ

Yes, it's quite clear where all the multiple locations are. I put
them there! hehehe... As I said in the original post, "Ok, I comment
out the lower-level ones and everything is
fine. "

But that isn't where I'm having the problem. Now as part of debugging
my code I continually go and edit/compile/simulate each of the lower-
level modules by themselves. In that case, they can't see the package
so I have to un-comment where I have the package defined in that
file. Then I can compile and everything is fine. But to stitch it
back together with the top level, I have to re-comment the package
definition in the lower level file. I'm sensing that my description
of things is not coming across... perhaps a pseudo-code example would
work:

Package mypkg is
...
end mypkg

entity top-level is
...
end top-level

architecture rtl of top-level is
...
(pile of component instances)
...
end rtl

__________________________________________-
(in another file...)

-- package mypkg IS
-- definition (this whole block is commented out
-- end mypkg

entity component1 IS
...
end component1

arch
...
end

_______________________________________
(in another file....)

-- package mypkg IS
-- definition (this whole block is commented out
-- end mypkg

entity component2 IS
...
end component1

arch
...
end

____________________________________

etc.....

Now when I want to work on component2 let's say. I uncomment the
package definition and edit/compile and get things right (this time
for sure! hehehe). Then to compile the top-level entity I have to
remember to go back and re-comment the package definition in
component2.

I hope that makes it a bit clearer. I'm just looking for a nice way
to maybe reference the package externally in each of the lower-level
entities so that I don't have to do this comment/uncomment cycle.

Thanks so much for any help you can give,

Shannon

I suspect what Martin mentioned is what I have to do. Somehow there
must be a way in Quartus just to include a file with the package
defined. Then when I do a compile it somehow gets attached and
compiled with the rest of it. I really suspect that I'm just not
driving Quartus the way I'm supposed to.

Shannon
WOOOOT! Ok, everyone stand down... I've figured it out. Believe it
or not you guys gave me the nudge I needed. Sometimes you just have
to describe your problem out loud and it gets the thought process
going.

I was so close. All I had to do was create the text file containing
the package. Then include it on the list of files in the Quartus
project. Then make sure it's pushed to the very top so that it gets
looked at first.

Thanks again. It's good to start the day with a good piece of
learning.

Shannon
 
On Tue, 11 Sep 2007 04:49:16 -0000, Shannon <sgomes@sbcglobal.net>
wrote:

Don't you just love all these softball questions from me?

Ok, I did my search through comp.lang.vhdl and didn't find what I'm
looking for.

I'm using my own package in some of my lower-level modules (entity/
architecture pairs).
When I stitch everything together in my top-level module then Quartus
complains that I've got the package defined in more than one
location. Ok, I comment out the lower-level ones and everything is
fine.

However, now when I edit my lower-level modules I have to keep
uncomment/re-comment the package definition. There has GOT to be an
easier (and more correct) method.

Is there a way to "compile" the package separately so that I only have
to "USE work.mypkg.all" in each of my lower-level modules?
Is the problem that every entity uses "work.mypkg.all", but, being in
different libraries, "work" is in a different place each time? Thus when
you put them all together, you have several different compiled "mypkg"
packages?

If so, then give up on "work" - I keep a "common" library for "things"
like packages (and common components) that I use in different places;
such as different projects, or entities in different libraries in a
large project.

Then each of them "USE common.mypkg.all" and there is only one mypkg,
which is compiled ONCE into library common.

No includes necessary.

Though maybe I'm totally misunderstanding the problem...

- Brian
 

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