Using LVDS Input for Delta Sigma ADC

[rickman]

I found an app note on the Lattice site about using the LVDS input as
the input comparator. My design is very low power and I am concerned
about the power consumption of this input. Typically inputs are not
supposed to operate in the linear region as this draws extra power in a
"shoot through" mode. The LVDS spends its entire time in this region.

Will this cause the power consumption to increase compared to a single
ended input driven digitally?

The parts I'm considering are the iCE40 and iCE65 chips from Lattice,
formerly Silicon Blue. The iCE65 is obsolete, but this is a proof of
concept so I don't much care if I can't use it in production. It has
better leakage current specs.

Rick

 

[jg]

On Monday, October 29, 2012 8:52:06 AM UTC+13, rickman wrote:

Will this cause the power consumption to increase compared to a single
ended input driven digitally?

You would need to measure a part.
Sweep both ways, which shows any Schmitt action.

Digital Inputs can draw a LOT of current near the threshold, and I've seen some even oscillate, and disturb other Logic.

Some LVC parts show well over 1mA.
I measured an Atmel ATF1502BE, at ~56uA, schmitt, and that was the best I've seen.

LVDS current drain will not be so voltage dependent, but they do need a bias current to set-up the whole differential IP. - and as they chase speed, do not expect that to be low-uA values.

Some of the better LVDS stages will actually deliver Rail-Rail IP, and some are N-FET only. Expect some hysteresis on these.

 

[rickman]

On 10/29/2012 1:14 AM, jg wrote:

On Monday, October 29, 2012 8:52:06 AM UTC+13, rickman wrote:

Will this cause the power consumption to increase compared to a single
ended input driven digitally?

You would need to measure a part.
Sweep both ways, which shows any Schmitt action.

I was hoping someone who has tried this trick might know how these
inputs are made. I'm told by the FAE there is no Schmitt.

Digital Inputs can draw a LOT of current near the threshold, and I've seen some even oscillate, and disturb other Logic.

You are talking about single ended inputs. A LVDS input normally
operates in a small range near Vcc/2. I don't expect the same level of
power consumption that a standard input would have. But I don't know
how they switch between these modes and I expect that will impact it
significantly.

Some LVC parts show well over 1mA.
I measured an Atmel ATF1502BE, at ~56uA, schmitt, and that was the best I've seen.

LVDS current drain will not be so voltage dependent, but they do need a bias current to set-up the whole differential IP. - and as they chase speed, do not expect that to be low-uA values.

Yes, that is a major concern. That could preclude the use of the LVDS
input.

Some of the better LVDS stages will actually deliver Rail-Rail IP, and some are N-FET only. Expect some hysteresis on these.

I'm trying to talk the FAE out of an eval board on the iCE65 parts which
are already EOL'd. With their focus on the iCE40 parts they should be
willing to part with one of these if they still have any. Then I can
take some measurements.

Rick

 

[glen herrmannsfeldt]

rickman <gnuarm@gmail.com> wrote:

(snip)

I'm trying to talk the FAE out of an eval board on the iCE65 parts which
are already EOL'd. With their focus on the iCE40 parts they should be
willing to part with one of these if they still have any. Then I can
take some measurements.

Tell them you will test it out and report good results to this group.

Of course, they would rather you not post the bad results, so it
will depend on how likely they think it is to work.

-- glen

 

[rickman]

On 10/29/2012 4:45 PM, jg wrote:

On Tuesday, October 30, 2012 7:42:55 AM UTC+13, glen herrmannsfeldt wrote:
Tell them you will test it out and report good results to this group.

Of course, they would rather you not post the bad results, so it
will depend on how likely they think it is to work.

-- glen


- but if the iCE65 is EOL, why bother.

This is basically a one off as a demonstration. The iCE65 has better
power figures at the low end. I might try the iCE 40. We'll see what I
can get from the FAE.

This is the sort of detail that could vary wildly between designs, so it wodl be best to check the parts/process you will actually use ?

There is a low cost iCE40 board - not sure if it includes LVDS silicon ?

If low power matters, I'd try a dual-slope over Sigma delta, as that allows uA opamps to be used, and avoids poorly spec'd Digital operation.

Dual-slope doesn't give much resolution unless you use a pretty low
sample rate relative to the clock rate. Or do I not understand
dual-slope that well?

I still need to look at a few things. It may turn out that I only need
a 1 bit ADC without the complexity of the delta-sigma converter... but
I'll still need the LVDS input as a comparitor.

Rick

 

[jg]

On Tuesday, October 30, 2012 7:42:55 AM UTC+13, glen herrmannsfeldt wrote:

Tell them you will test it out and report good results to this group.

Of course, they would rather you not post the bad results, so it
will depend on how likely they think it is to work.

-- glen

- but if the iCE65 is EOL, why bother.

This is the sort of detail that could vary wildly between designs, so it wodl be best to check the parts/process you will actually use ?

There is a low cost iCE40 board - not sure if it includes LVDS silicon ?

If low power matters, I'd try a dual-slope over Sigma delta, as that allows uA opamps to be used, and avoids poorly spec'd Digital operation.



-jg

 

[langwadt@fonz.dk]

On Oct 28, 8:52 pm, rickman <gnu...@gmail.com> wrote:

I found an app note on the Lattice site about using the LVDS input as
the input comparator.  My design is very low power and I am concerned
about the power consumption of this input.  Typically inputs are not
supposed to operate in the linear region as this draws extra power in a
"shoot through" mode.  The LVDS spends its entire time in this region.

Will this cause the power consumption to increase compared to a single
ended input driven digitally?

The parts I'm considering are the iCE40 and iCE65 chips from Lattice,
formerly Silicon Blue.  The iCE65 is obsolete, but this is a proof of
concept so I don't much care if I can't use it in production.  It has
better leakage current specs.

Rick

I don't know how valid it really is but:
http://www.patentgenius.com/patent/8212700.html

-Lasse