K
kb33
Guest
Hi,
I wanted to know whether it is possible to use the contents of one
array to index into another array in Verilog. For eg, in C language, it
would look somthing like...
int array1[10];
int array2[10];
/* Initialize each location in array1 to some value*/
array1[0] = 2;
array1[1] = 4;
array1[2] = 6;
..
..
..
..
..
..
..
array1[9] = 3;
/* Now, use the contents of array1 to index into array2*/
for (i = 0; i < 10; i++)
array2 [array1] = /* Do some computation, doesn't matter what..*/
Thanks,
Kanchan
I wanted to know whether it is possible to use the contents of one
array to index into another array in Verilog. For eg, in C language, it
would look somthing like...
int array1[10];
int array2[10];
/* Initialize each location in array1 to some value*/
array1[0] = 2;
array1[1] = 4;
array1[2] = 6;
..
..
..
..
..
..
..
array1[9] = 3;
/* Now, use the contents of array1 to index into array2*/
for (i = 0; i < 10; i++)
array2 [array1] = /* Do some computation, doesn't matter what..*/
Thanks,
Kanchan