Using absolute time unit in initial block

G

googler

Guest
Please refer to the initial block below.

initial begin
a <= 2'b00;
b <= 2'b00;
c <= 2'b00; // time = 0
#5 a <= 2'b01; // time = 5
#3 b <= 2'b10; // time = 8
#4 c <= 2'b11; // time = 12
end

Is there a way I can use the absolute time unit (as shown as part of
comment on right) in my code instead of having to use the time
difference relative to last statement?
 
Within a single initial block execution is sequential and hence you
can't achieve what you want. You can do that if you spread it across
multiple initial blocks. But, this is a very primitive testbench style
and is hardly useful for non-trivial designs (except for auto generated
tests from VCD files etc.).

I discuss this and much more as part of "Comprehensive Functional
Verification" course that my company offers in Bangalore (From today it
is: Bengaluru ), contact me via email ajeetha <>gmail.com if
interested.

Regards
Ajeetha, CVC
www.noveldv.com

googler wrote:
Please refer to the initial block below.

initial begin
a <= 2'b00;
b <= 2'b00;
c <= 2'b00; // time = 0
#5 a <= 2'b01; // time = 5
#3 b <= 2'b10; // time = 8
#4 c <= 2'b11; // time = 12
end

Is there a way I can use the absolute time unit (as shown as part of
comment on right) in my code instead of having to use the time
difference relative to last statement?
 
"googler" <pinaki_m77@yahoo.com> writes:

Please refer to the initial block below.

initial begin
a <= 2'b00;
b <= 2'b00;
c <= 2'b00; // time = 0
#5 a <= 2'b01; // time = 5
#3 b <= 2'b10; // time = 8
#4 c <= 2'b11; // time = 12
end

Is there a way I can use the absolute time unit (as shown as part of
comment on right) in my code instead of having to use the time
difference relative to last statement?
If you can separate the time when the expression is evaluated and the
time the assignment occurs, then you can use the following form.
Because the assignmkents are non-blocking, the delays in the
statements below are not cummulative and each one applies
independently. You can even re-order the statements and they will
still occur at the times indicated.

a <= #5 2'b01; // time = 5
c <= #12 2'b11; // time = 12
b <= #8 2'b10; // time = 8

Oops, there is one other catch, there are subtleties when you have two
assignments to one variable. I believe the simulator isn't required
to put the 0 value in a at time 0, and it can simply schedule the
storage of the 1 value in a at time 5. Now, I may have the semantics
on this wrong (and hopefully one the gurus like Steve Sharp will
correct me if I do). Moreover, I am certain that a simulator is not
*required* not to put the 0 value in at time 0--i.e. it can do so if
it is convenient for it.

a <= 2'b00; // time = 0
a <= #5 2'b01; // time = 5

Hope this helps,
-Chris

*****************************************************************************
Chris Clark Internet : compres@world.std.com
Compiler Resources, Inc. Web Site : http://world.std.com/~compres
23 Bailey Rd voice : (508) 435-5016
Berlin, MA 01503 USA fax : (978) 838-0263 (24 hours)
------------------------------------------------------------------------------
 
On 31 Oct 2006 17:33:14 -0800, "googler" <pinaki_m77@yahoo.com> wrote:

Please refer to the initial block below.

initial begin
a <= 2'b00;
b <= 2'b00;
c <= 2'b00; // time = 0
#5 a <= 2'b01; // time = 5
#3 b <= 2'b10; // time = 8
#4 c <= 2'b11; // time = 12
end

Is there a way I can use the absolute time unit (as shown as part of
comment on right) in my code instead of having to use the time
difference relative to last statement?
Others have already given useful responses, but you may also wish
to consider this idea:

task automatic wait_until (input time t);
if (t < $time)
$display("wait_until: time %t has already passed!", t);
else
#(t - $time);
endtask

Now you can rewrite your code thus:

a <= 2'b00;
b <= 2'b00;
wait_until(5);
a <= 2'b01;
wait_until(8);
b <= 2'b10;

etc.

The task has some limitations, but should be OK
for many purposes.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 

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