A
ALuPin
Guest
Hi,
I have a question concerning the intelligence of the compiler in
QuartusII software:
Of course I can use FIFO structures that can be uses as templates which
only have to be instantiated. The contol logic has to be built around
that template.
But what if I write my own FIFO VHDL code, does the compiler "recognize"
it to a certain degree and does the compiler then use memory bits instead
of logic ressources? I have written my own module in which there is
a fifo function with additional logic around it.
But the compiler does only use logic ressources.
Is there something I have to bear in mind
if I want the compiler to use memory bits or even fifos ?
Thank you very much
Kind regards
Andrés Vázquez
Guntermann & Drunck
System Development
I have a question concerning the intelligence of the compiler in
QuartusII software:
Of course I can use FIFO structures that can be uses as templates which
only have to be instantiated. The contol logic has to be built around
that template.
But what if I write my own FIFO VHDL code, does the compiler "recognize"
it to a certain degree and does the compiler then use memory bits instead
of logic ressources? I have written my own module in which there is
a fifo function with additional logic around it.
But the compiler does only use logic ressources.
Is there something I have to bear in mind
if I want the compiler to use memory bits or even fifos ?
Thank you very much
Kind regards
Andrés Vázquez
Guntermann & Drunck
System Development