USB vhdl code

[Paolo Santinelli]

I am Paolo Santinelli, I am a teacher, I have a laboratory course on
computer architecture and FPGA at the University of Modena and Reggio
Emilia, Italy. I am looking for a USB vhdl synthesizable model to use in my
course.

Should you gave me some helps ?




Thanks in advance.

paolo.santinelli@unimo.it


Paolo Santinelli.