USB interface between computer and FPGA

S

Smith

Guest
Hi all.
I would like to seek for any opinion on the USB interface between the
computer and FPGA.
Is it already an established technology? Is that workable?
Can someone tell me the approach that should take for designing the USB
interface?

Thanks advance for any suggestion and help.

Best regards,
Smith
 
"Smith" <smith1874@yahoo.com> wrote in message
news:1147776979.765484.35110@i40g2000cwc.googlegroups.com...
I would like to seek for any opinion on the USB interface between the
computer and FPGA.
Is it already an established technology? Is that workable?
Click to expand...
Yes.

Can someone tell me the approach that should take for designing the USB
interface?
Click to expand...
You will need a PHY to handle the signal levels (and the serial engine for
USB 2.0)

For the rest of the functionality, use an IP core. Either public domain or
buy one.

Marco
________________________
Marc Reinig
UCO/Lick Observatory
Laboratory for Adaptive Optics

Thanks advance for any suggestion and help.

Best regards,
Smith
Click to expand...
 
You can take a look at connecting a USB controller chip
to the FPGA - We've used the Cypress FX2 for a couple
of projects and it works well. It has a flexible interface,
so you can set it up for 8 or 16 bit bus interface and
adjust the timing as desired.

The QuickUsb module has one that you can wire to a
FPGA fairly easily.

Good luck!

John Providenza
 
For the rest of the functionality, use an IP core. Either public domain or
buy one.
Click to expand...
implementing USB in an FPGA can be done. The resulting ressource usage
is low, and the solution might be very handy. I have implemented a
12Mbps USB core a few years ago:
http://www.bertram-family.com/felix/usb_core.html

In contrast to Austin's perception, this might be a good idea in case
you have special requirements, which are easier to meet, when tightly
integrating the USB interface with your application. However, most of
these reasons are gone, since USB 2.0 with 480Mbps is available and
bandwidth is no longer an issue.

Regarding cores in the public domain: I currently know only one USB 2
core in the public domain. This core *does* have problems and is missing
all the required stuff to fix these easily: No testbenches, no
documentation, no status, no community. It depends on your USB
experience (and you will need to know the spec quite well), if you are
really able to use this and fix the problems. Think carefully.

Regarding proprietary cores: Since the major FPGA vendors have decided
that they will not provide a USB core as part of their portfolios, you
will need to look at specialized IP vendors. This is probably a five to
six digit figure, depending on the chosen vendor.

In case you have a simple application: Use the Cypress FX2 chip. This
chip comes with nice eval boards, good documentation, good sample code,
drivers, whatever you need. The chip will usually receive its firmware
from the driver on the host system during device enumeration. This
mechanism can be used to download the FPGA bitstream as well, saving the
configuration flash and making the solution more easily updated. We have
done something like that a few years ago (with USB 1.1):
http://www.bertram-family.com/felix/emi26.html

Hope this helps,
best regards

Felix
--
Dipl.-Ing. Felix Bertram
http://www.bertram-family.com/felix
 
Hi, Marco
Do u know where i can get the IP core for serial interface? a public
one.
 
Thanks for all of you for giving me constructive ideas
Can I know that wat if i use the Cypress FX2 chip, is that i no need to
do any HDL design for the USB interface?
Thanks advance.
 
Do u know where i can get the IP core for serial interface? a public
one.
Click to expand...
Public cores can be found at
http://www.opencores.org

There should be two cores: One for USB 1.1, another for USB 2. Regarding
USB cores, there are two different concepts:

1) do all the bus enumeration with a state machine inside the FPGA. This
saves you from having to implement and understand the USB firmware. On
the other hand, this might have the disadvantages of low flexibility and
cumbersome maintenance.

2) handle the protocol with a CPU. This CPU could either reside inside
the FPGA, or be an external one. This is the way most controllers work,
and which is most flexible. You will need to understand the protocol
layer of the USB spec in order to create the firmware, though.

Contact me personally, if you are interested in purchasing a USB 1.1
core for a reasonably low license fee.

Can I know that wat if i use the Cypress FX2 chip, is that i no need to
do any HDL design for the USB interface?
Click to expand...
in case you decide to use the Cypress FX2 chip, you would not need to
develop any HDL for the USB interface. Of course you would need to
interface the FPGA with the FX2. However, this is not too complicated,
Cypress should have the associated wave forms printed in the FX2 data sheet.


Best regards, Felix
--
Dipl.-Ing. Felix Bertram
http://www.bertram-family.com/felix
 
thanks for you all constructive opinion.
I am now trying to use the public IP core. Thanks again.

Felix Bertram wrote:
Do u know where i can get the IP core for serial interface? a public
one.

Public cores can be found at
http://www.opencores.org

There should be two cores: One for USB 1.1, another for USB 2. Regarding
USB cores, there are two different concepts:

1) do all the bus enumeration with a state machine inside the FPGA. This
saves you from having to implement and understand the USB firmware. On
the other hand, this might have the disadvantages of low flexibility and
cumbersome maintenance.

2) handle the protocol with a CPU. This CPU could either reside inside
the FPGA, or be an external one. This is the way most controllers work,
and which is most flexible. You will need to understand the protocol
layer of the USB spec in order to create the firmware, though.

Contact me personally, if you are interested in purchasing a USB 1.1
core for a reasonably low license fee.

Can I know that wat if i use the Cypress FX2 chip, is that i no need to
do any HDL design for the USB interface?

in case you decide to use the Cypress FX2 chip, you would not need to
develop any HDL for the USB interface. Of course you would need to
interface the FPGA with the FX2. However, this is not too complicated,
Cypress should have the associated wave forms printed in the FX2 data sheet.


Best regards, Felix
--
Dipl.-Ing. Felix Bertram
http://www.bertram-family.com/felix
Click to expand...
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top