Un used wires

[Javier Correa]

I have some modules that at the output i don't always need all the wires,
and at the syntesis y got warning, is there any safe way to do this?

 

[Alexander Gnusin]

"Javier Correa" <jcvnueva@vtr.net> wrote in message news:<bmpoh9$uhf$1@news1.nivel5.cl>...

I have some modules that at the output i don't always need all the wires,
and at the syntesis y got warning, is there any safe way to do this?

Design Compiler (I guess, are using it) grounds undriven output ports
of a design during compile. If you apply "set_unconnected" command to
the undriven output ports, Design Compiler eliminates any logic
driving these ports and does not ground them. In any case, DC informs
you with warnings about all undriven output ports.

Regards,
Alexander Gnusin
www.TCLforEDA.net