udp(user define primitive)

A

a.h e.j

Guest
hello every one how are you?
i want to know more information and more code verilog about udp
does anyone know link or lecture?
thanks alot.
s.amir.hossen
 
Dear AHEJ,

i want to know more information and more code verilog about udp
does anyone know link or lecture?

I recall Verilog UDPs being very popular in the late 90s (when I was just starting). However, this degree of freedom has proved incompatible with the stability that is required especially by synthesis tools. I also see a point in using UDPs when developing a new cell library.

With the UDP mechanism you can define your own primitives (combinational or sequential circuits) and in a way extend the Verilog HDL language.

I am sure all versions of the Verilog standard since Verilog-1995 give sufficient coverage of UDPs. For a much more simple coverage of the subject, check out slides 12 to 15 in one of my Verilog course lectures:

http://www.nkavvadias.com/courses/verilog/verilog_lecture_04.pdf

It is written in Greek, but the examples can be easily understood.

Best regards
Nikolaos Kavvadias
http://www.nkavvadias.com
 
Nikolaos Kavvadias wrote:
Dear AHEJ,

i want to know more information and more code verilog about udp
does anyone know link or lecture?

I recall Verilog UDPs being very popular in the late 90s (when I was just starting). However, this degree of freedom has proved incompatible with the stability that is required especially by synthesis tools. I also see a point in using UDPs when developing a new cell library.

With the UDP mechanism you can define your own primitives (combinational or sequential circuits) and in a way extend the Verilog HDL language.

I am sure all versions of the Verilog standard since Verilog-1995 give sufficient coverage of UDPs. For a much more simple coverage of the subject, check out slides 12 to 15 in one of my Verilog course lectures:

http://www.nkavvadias.com/courses/verilog/verilog_lecture_04.pdf

It is written in Greek, but the examples can be easily understood.

Best regards
Nikolaos Kavvadias
http://www.nkavvadias.com

I was wondering about the table under "mux2to1" where you have
some terms that overlap. For example:

0?0 : 0;
00? : 0;

Does this imply that the hardware would include transition coverage
terms to prevent glitches when the select line changes but both
inputs are low? Or is the second term just redundant?

--
Gabor
 

Welcome to EDABoard.com

Sponsor

Back
Top