UART testbench

W

won

Guest
Hi ,

Did any one wrote a test bench for Vibhu vivek's verilog code at this link
http://www-ee.eng.hawaii.edu/~ee628web/Spr99/Working/proj_1/proj_1.htm

I am facing some errors while simulating it.
Can any one send me the testbench ,that works on it.
If possible reply to my e-mail address.

Thank you
Won
 

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