type of data "X FORCING UNKNOW"

J

Jluis

Guest
hI EVERYBODY
I SIMULATED TRANSFERING BETWEEN TW0 REGISTERS AND WHEN I SEE THE
WAVEFORM APPEAR AN STATE "X" (FORCING UNKNOW), FOR EXAMPLE IF I
TRANSFER 010101 FROM ONE REGISTER TO THE OTHER REGISTER, ON THE SECON
REGISTER APPEAR 0X010X, I DONT KNOW WHY.

SO ANYBODY KNOWS WHY IS HAPPENING THIS?

I THINK THAT IS MY CLOCK, BUT I DONT KNOW EXACTLY BECAUSE I HAVE
CHANGED MANY TIMES THE VALUE FROM 2.5 MHZ TO 25 MHZ, NOW I USE 2.5
MHZ.

ANY IDEAS??????
 
Jluis a écrit:
hI EVERYBODY
I SIMULATED TRANSFERING BETWEEN TW0 REGISTERS AND WHEN I SEE THE
WAVEFORM APPEAR AN STATE "X" (FORCING UNKNOW), FOR EXAMPLE IF I
TRANSFER 010101 FROM ONE REGISTER TO THE OTHER REGISTER, ON THE SECON
REGISTER APPEAR 0X010X, I DONT KNOW WHY.

SO ANYBODY KNOWS WHY IS HAPPENING THIS?
Hi
Please stop shouting and post your code, we're no wizards.
I suppose you initialized your registers in a process and assign them a
value in another or something.
Clock frequency has nothing to do with this in a purely functionnal
simulation.

--
____ _ __ ___
| _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le -
| | | | | (_| |_| | Invalid return address: remove the -
|_| |_|_|\__|\___/
 
Speak for yourself ! ;-)

Nicolas Matringe wrote:

Please stop shouting and post your code, we're no wizards.
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
 
Ray Andraka a écrit:
Speak for yourself ! ;-)

Nicolas Matringe wrote:
Please stop shouting and post your code, we're no wizards.
Weeeeeeell... Yes.
Though I hadn't noticed *that* kind of wizarding around :eek:)

--
____ _ __ ___
| _ \_)/ _|/ _ \ I shouldn't read the newsgroups before
| | | | | (_| |_| | having my second mug of coffee...
|_| |_|_|\__|\___/
 
Hi,
Check the relationship between your clock and both registers data inputs.
Make sure there is no setup/hold time violations.
Also check set/reset (clock enable) signals in 2nd register near the clock
active edge.
 
Hi Jluis,

Check too that register input bit where 'x' appear are not drive by two
diffferent inputs. If multiple inputs didn't give the same value at the
same time, that can give you this result.

JaI

Jluis wrote:

hI EVERYBODY
I SIMULATED TRANSFERING BETWEEN TW0 REGISTERS AND WHEN I SEE THE
WAVEFORM APPEAR AN STATE "X" (FORCING UNKNOW), FOR EXAMPLE IF I
TRANSFER 010101 FROM ONE REGISTER TO THE OTHER REGISTER, ON THE SECON
REGISTER APPEAR 0X010X, I DONT KNOW WHY.

SO ANYBODY KNOWS WHY IS HAPPENING THIS?

I THINK THAT IS MY CLOCK, BUT I DONT KNOW EXACTLY BECAUSE I HAVE
CHANGED MANY TIMES THE VALUE FROM 2.5 MHZ TO 25 MHZ, NOW I USE 2.5
MHZ.

ANY IDEAS??????
 
THNAKS VHDL GROOUP I solved the problem, in fact this transfer is as
part of Aritmetic Logic Unit, and also this alu is part of others
component, so I found a big mistakes in my top file, I had manY if´s
sentences, like this:

IF X= '1' THEN
Z<= T;
ELSIF E=1 THEN
S <= R;
ELSIF THEN
ELSIF THEN
ELSIF THEN
ELSIF THEN
....
ELSIF THEN
END IF

SO i CHANGED THIS IF´s SENTENCES FOR THIS:

IF X= '1' THEN
Z<= T;
END IF

IF E=1 THEN
S <= R;
END IF;

IF THEN
END IF;

IF THEN
END IF;

AND SO ON....


So this changes of my files solve the problem.

but I dont know what is the diference???


thaks again.
jluis





joself@cimat.mx (Jluis) wrote in message news:<26e0122e.0406031133.3f84bd35@posting.google.com>...
hI EVERYBODY
I SIMULATED TRANSFERING BETWEEN TW0 REGISTERS AND WHEN I SEE THE
WAVEFORM APPEAR AN STATE "X" (FORCING UNKNOW), FOR EXAMPLE IF I
TRANSFER 010101 FROM ONE REGISTER TO THE OTHER REGISTER, ON THE SECON
REGISTER APPEAR 0X010X, I DONT KNOW WHY.

SO ANYBODY KNOWS WHY IS HAPPENING THIS?

I THINK THAT IS MY CLOCK, BUT I DONT KNOW EXACTLY BECAUSE I HAVE
CHANGED MANY TIMES THE VALUE FROM 2.5 MHZ TO 25 MHZ, NOW I USE 2.5
MHZ.

ANY IDEAS??????
 
Hi Jluis,

In the case of "if...then...elsif...then...else", you stop at the first
true condition (see VHDL LRM section 8.7); so if you have X='1' and
E='1' simultaneously, you never assign R to S.
Don't forget that "if...then...elsif...then...else" is equivalent to have:

if (condition) then
instruction
else
if (condition) then
instruction
else
instruction
end if
end if

==> Two "if...then...else" imbricated

In you corrected version, you decorrelated test of X value and test of E
value. So if the X='1' and E='1' are simultaneaously, you assign the
value T to Z, and the value R to S.

Rgrds,
JaI

Jluis wrote:

THNAKS VHDL GROOUP I solved the problem, in fact this transfer is as
part of Aritmetic Logic Unit, and also this alu is part of others
component, so I found a big mistakes in my top file, I had manY if´s
sentences, like this:

IF X= '1' THEN
Z<= T;
ELSIF E=1 THEN
S <= R;
ELSIF THEN
ELSIF THEN
ELSIF THEN
ELSIF THEN
...
ELSIF THEN
END IF

SO i CHANGED THIS IF´s SENTENCES FOR THIS:

IF X= '1' THEN
Z<= T;
END IF

IF E=1 THEN
S <= R;
END IF;

IF THEN
END IF;

IF THEN
END IF;

AND SO ON....


So this changes of my files solve the problem.

but I dont know what is the diference???


thaks again.
jluis





joself@cimat.mx (Jluis) wrote in message news:<26e0122e.0406031133.3f84bd35@posting.google.com>...


hI EVERYBODY
I SIMULATED TRANSFERING BETWEEN TW0 REGISTERS AND WHEN I SEE THE
WAVEFORM APPEAR AN STATE "X" (FORCING UNKNOW), FOR EXAMPLE IF I
TRANSFER 010101 FROM ONE REGISTER TO THE OTHER REGISTER, ON THE SECON
REGISTER APPEAR 0X010X, I DONT KNOW WHY.

SO ANYBODY KNOWS WHY IS HAPPENING THIS?

I THINK THAT IS MY CLOCK, BUT I DONT KNOW EXACTLY BECAUSE I HAVE
CHANGED MANY TIMES THE VALUE FROM 2.5 MHZ TO 25 MHZ, NOW I USE 2.5
MHZ.

ANY IDEAS??????
 

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