O
Olaf
Guest
Hello,
I'm writing a loadable counter. To support different clocks I wrote a
function to determine the reload value:
entity ...
generic (
RESET_ACTIVE : std_ulogic := '1';
T_CLK : time := 20 ns); -- 50 MHz
port (
...
architecture ...
-- ceil(log2(T_MAX / T_CLK))-1 downto 0
signal delay_count : unsigned(19 downto 0);
signal enable_delay : std_ulogic;
signal delay_done : std_ulogic;
procedure set_delay (constant delay : time) is
constant value : natural := delay / T_CLK;
begin
assert (delay > T_CLK)
report "delay smaller than clock cycle!!"
severity WARNING;
assert (value < 2**delay_count'length - 1)
report "Error: count vector range doesn't match divider integer
range!"
severity error;
delay_count <= unsigned(value, delay_count'length); --XXX
end procedure;
begin ...
which results in the error:
** Error: Cannot drive signal 'delay_count' from this subprogram.
** Error: Type conversion (to unsigned) can not have aggregate operand.
value is an aggregate operand? It is constant, or what's wrong?
Thanks
Olaf
I'm writing a loadable counter. To support different clocks I wrote a
function to determine the reload value:
entity ...
generic (
RESET_ACTIVE : std_ulogic := '1';
T_CLK : time := 20 ns); -- 50 MHz
port (
...
architecture ...
-- ceil(log2(T_MAX / T_CLK))-1 downto 0
signal delay_count : unsigned(19 downto 0);
signal enable_delay : std_ulogic;
signal delay_done : std_ulogic;
procedure set_delay (constant delay : time) is
constant value : natural := delay / T_CLK;
begin
assert (delay > T_CLK)
report "delay smaller than clock cycle!!"
severity WARNING;
assert (value < 2**delay_count'length - 1)
report "Error: count vector range doesn't match divider integer
range!"
severity error;
delay_count <= unsigned(value, delay_count'length); --XXX
end procedure;
begin ...
which results in the error:
** Error: Cannot drive signal 'delay_count' from this subprogram.
** Error: Type conversion (to unsigned) can not have aggregate operand.
value is an aggregate operand? It is constant, or what's wrong?
Thanks
Olaf