Two Questions

[pallav]

Hi,

I have two questions I'm hoping I can get some input on.

1. I would like to learn a little bit about IEEE 754 floating point
unit . Does anybody have any recommendations on any good books that
talk about hardware implementation of addition/multiplication/division
algorithms, etc? My ultimate goal is to try to design a MIPS I FPU.
Not looking for a heavy mathematical treatise.

2. I am trying to implement "count leading one/zeros" for a 32 bit
register (for integer operations). Basically, if I have 111010101...,
the leading one count is 3 or 111100011..., the leading one count is
4. So far, the only way I can think to code this up is to hardcode all
the cases in a big casex statement. For counting leading zeros, I can
just invert the register and count leading ones. Are there any neat
tricks anyone is aware of to do this in a better way? There seems to
be lots of papers on leading one predictor for FPUs but that might be
an overkill for this.

Thanks for any ideas.

Kind regards,

 

[Jason Zheng]

On Fri, 8 May 2009 10:38:24 -0700 (PDT)
pallav <pallavgupta@gmail.com> wrote:

1. I would like to learn a little bit about IEEE 754 floating point
unit . Does anybody have any recommendations on any good books that
talk about hardware implementation of addition/multiplication/division
algorithms, etc? My ultimate goal is to try to design a MIPS I FPU.
Not looking for a heavy mathematical treatise.

Digital Arithmetic by Milos Ercegovac. Very detailed explanations with
both theory and practice in mind.

http://www.amazon.com/Digital-Arithmetic-Kaufmann-Computer-Architecture/dp/1558607986


--
It's not that I'm afraid to die. I just don't want to be there when it
happens. -- Woody Allen

 

[pallav]

Ignore question 2. I think its just a 32-bit priority encoder.
I could probably construct it from smaller 8 bit priority encoders.

 

[glen herrmannsfeldt]

pallav <pallavgupta@gmail.com> wrote:

I have two questions I'm hoping I can get some input on.
(snip)

2. I am trying to implement "count leading one/zeros" for a 32 bit
register (for integer operations). Basically, if I have 111010101...,
the leading one count is 3 or 111100011..., the leading one count is
4. So far, the only way I can think to code this up is to hardcode all
the cases in a big casex statement. For counting leading zeros, I can
just invert the register and count leading ones. Are there any neat
tricks anyone is aware of to do this in a better way? There seems to
be lots of papers on leading one predictor for FPUs but that might be
an overkill for this.

What you want is called a priority encoder. I am not sure if
the CASE will synthesize to one or not. Think about it in
binary terms and a reasonable design might come out.

-- glen