trireg case analasys

  • Thread starter vijay.gampa@gmail.com
  • Start date
V

vijay.gampa@gmail.com

Guest
Hi All,

Any one have any idea the difference between the large/medium/small
charge strengths w.r.t trireg. Does any have done the case analasys on
this?
Is there any difference when the trireg is of medium with infinite
decay time and large strength with infinite decay time in digital
simulations when every master on that trireg bus is in Hi Z state.

Thanks,
Vijay Gampa
 
On Oct 16, 10:54 am, "vijay.ga...@gmail.com" <vijay.ga...@gmail.com>
wrote:
Any one have any idea the difference between the large/medium/small
charge strengths w.r.t trireg. Does any have done the case analasys on
this?
The charge strength doesn't matter unless you connect it to another
trireg of different strength using a transistor primitive. I have
never actually seen anyone using Verilog to model charge-sharing
networks like this.

Is there any difference when the trireg is of medium with infinite
decay time and large strength with infinite decay time in digital
simulations when every master on that trireg bus is in Hi Z state.
No, not really. The result will be a different strength, but the
same value either way. Unless you have 'weak' drivers on the bus,
the trireg strength is weaker than the active drivers, so the same
resolved value will result.
 
Hi,
I do not have any weak drivers but have seen the difference between
large/medium with infinite decay time.
Is there any other possibility?
In the simulation, I have observed that X's are going on after some
time when I use medium strength.
In case of large strength, the previous value got restored.

Thanks,
Vijay Gampa


On Oct 16, 11:49 pm, sh...@cadence.com wrote:
On Oct 16, 10:54 am, "vijay.ga...@gmail.com" <vijay.ga...@gmail.com
wrote:



Any one have any idea the difference between the large/medium/small
charge strengths w.r.t trireg. Does any have done the case analasys on
this?

The charge strength doesn't matter unless you connect it to another
trireg of different strength using a transistor primitive.  I have
never actually seen anyone using Verilog to model charge-sharing
networks like this.

Is there any difference when the trireg is of medium with infinite
decay time and large strength with infinite decay time in digital
simulations when every master on that trireg bus is in Hi Z state.

No, not really.  The result will be a different strength, but the
same value either way.  Unless you have 'weak' drivers on the bus,
the trireg strength is weaker than the active drivers, so the same
resolved value will result.
 
On Oct 21, 2:59 am, "vijay.ga...@gmail.com" <vijay.ga...@gmail.com>
wrote:
Hi,
I do not have any weak drivers but have seen the difference between
large/medium with infinite decay time.
Is there any other possibility?
In the simulation, I have observed that X's are going on after some
time when I use medium strength.
In case of large strength, the previous value got restored.
Either you are missing something in your description, or your
simulator has a bug. Decay time is not dependent on the charge
strength, but is specified independently. If you have specified
infinite decay time, then there should be no decay. The trireg should
hold its value indefinitely until driven to a different value by a
driver that is stronger than its charge strength.
 
On Oct 21, 2:59 am, "vijay.ga...@gmail.com" <vijay.ga...@gmail.com>
wrote:

I do not have any weak drivers but have seen the difference between
large/medium with infinite decay time.
Is there any other possibility?
In the simulation, I have observed that X's are going on after some
time when I use medium strength.
In case of large strength, the previous value got restored.
The only other thing I can think of is that you might be connecting
this trireg through a port to another trireg that has a finite decay
time. If the port is collapsed (as usually happens), then both nets
become the same net. The final net should be the net that has the
higher charge strength. If the final net is the one with the finite
decay time, then you will get the finite decay time. If the final net
is the one with the infinite decay time, then you will get the
infinite decay time. Changing the strength on your net could change
which net becomes the final net, and therefore which decay time is
used.
 
Hi,

I do not have another trireg, but having "notif1"(with delays
#(0.2:0:6.9,0.2:0:1.2)) which was connected to trireg of medium with
infinite delay.
Does this make difference on the trireg charge strangth and decay
time?
How do we know the final net decay time and final strength if two
different triregs of different strengths and decay times were
connected?
Could you please point me to the documentaion on this, if you any.

fyi ..... I am using IUS8.1 for this.

Thanks,
Vijay Gampa


On Oct 22, 4:38 am, sh...@cadence.com wrote:
On Oct 21, 2:59 am, "vijay.ga...@gmail.com" <vijay.ga...@gmail.com
wrote:

I do not have any weak drivers but have seen the difference between
large/medium with infinite decay time.
Is there any other possibility?
In the simulation, I have observed that X's are going on after some
time when I use medium strength.
In case of large strength, the previous value got restored.

The only other thing I can think of is that you might be connecting
this trireg through a port to another trireg that has a finite decay
time.  If the port is collapsed (as usually happens), then both nets
become the same net.  The final net should be the net that has the
higher charge strength.  If the final net is the one with the finite
decay time, then you will get the finite decay time.  If the final net
is the one with the infinite decay time, then you will get the
infinite decay time.  Changing the strength on your net could change
which net becomes the final net, and therefore which decay time is
used.
 
On Oct 23, 3:35 am, "vijay.ga...@gmail.com" <vijay.ga...@gmail.com>
wrote:
I do not have another trireg, but having "notif1"(with delays
#(0.2:0:6.9,0.2:0:1.2)) which was connected to trireg of medium with
infinite delay.
Does this make difference on the trireg charge strangth and decay
time?
The delays on the notif1 will not affect the trireg charge strength or
decay time. They will only affect the delay from the input to the
output of the notif1.

How do we know the final net decay time and final strength if two
different triregs of different strengths and decay times were
connected?
Could you please point me to the documentaion on this, if you any.
I don't believe the LRM covers this case. It only describes the
situation when different net types are connected, not when two triregs
of different strengths are connected. So we can only reason based on
the physical situation being modelled, or the closest similar
situations in the language.

Physically, if you connect a large capacitor in parallel with a small
capacitor, you get a large capacitance rather than a small one
(actually larger than the large capacitor, but this is an abstract
model, not an analog simulator).

The closest similar situation in the language would be connecting the
large strength trireg to the small strength trireg via a tran switch.
In that case, the large trireg will always overcome the small one, and
both sides of the tran will have the value of the large trireg. The
decaying of the small trireg will be irrelevant, as the large trireg
will always overcome its value. This behavior is equivalent to a
collapsed net with the properties of the larger trireg, so that is
what should be done when collapsing ports.

fyi ..... I am using IUS8.1 for this.
Can you reproduce this behavior in a small testcase with just the
trireg and its drivers, and without the rest of your design? If not,
this may indicate that the cause is something in your design that you
have not found yet. You might try using the signal flow browser or
the driver command to track down what is driving the net when its
behavior becomes unexpected. If you can reproduce it in a small
testcase, then I can look at it.
 

Welcome to EDABoard.com

Sponsor

Back
Top