transformer coupled logic isolator...

[server]

Version 4
SHEET 1 880 680
WIRE 480 -32 384 -32
WIRE 608 -32 560 -32
WIRE 608 80 608 -32
WIRE 608 80 544 80
WIRE 656 80 608 80
WIRE 688 80 656 80
WIRE -112 96 -160 96
WIRE -64 96 -112 96
WIRE 48 96 16 96
WIRE 80 96 48 96
WIRE 240 96 192 96
WIRE 272 96 240 96
WIRE 384 96 384 -32
WIRE 384 96 336 96
WIRE 432 96 384 96
WIRE 480 96 432 96
WIRE -160 144 -160 96
WIRE 80 144 80 96
WIRE 192 144 192 96
WIRE -160 256 -160 224
WIRE 80 256 80 224
WIRE 192 256 192 224
FLAG 80 256 0
FLAG 192 256 0
FLAG -160 256 0
FLAG 656 80 OUT
FLAG 432 96 G
FLAG 240 96 S
FLAG 48 96 P
FLAG -112 96 IN
SYMBOL ind2 64 128 R0
WINDOW 0 -53 39 Left 2
WINDOW 3 -60 70 Left 2
SYMATTR InstName L1
SYMATTR Value 10µ
SYMATTR Type ind
SYMBOL ind2 176 128 R0
WINDOW 0 56 34 Left 2
WINDOW 3 51 66 Left 2
SYMATTR InstName L2
SYMATTR Value 10µ
SYMATTR Type ind
SYMBOL res 32 80 R90
WINDOW 0 -40 54 VBottom 2
WINDOW 3 -34 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 464 -16 R270
WINDOW 0 -38 20 VTop 2
WINDOW 3 -10 94 VBottom 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage -160 128 R0
WINDOW 0 39 113 Left 2
WINDOW 3 -61 184 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 10n 5n 5n 10u 20u 10)
SYMBOL Digital\\\\schmitt 480 32 R0
WINDOW 0 15 116 Left 2
SYMATTR InstName A1
SYMATTR SpiceLine Vhigh=3.3 VT=1.65 VH=0.4 Td=5n
SYMBOL cap 336 80 R90
WINDOW 0 -48 30 VBottom 2
WINDOW 3 -39 29 VTop 2
SYMATTR InstName C1
SYMATTR Value 250p
TEXT 64 40 Left 2 !K1 L1 L2 0.98
TEXT 352 304 Left 2 !.tran 0 250u 0 1n
TEXT 360 208 Left 2 ;Logic Coupler
TEXT 352 256 Left 2 ;JL Dec 29 2021


--

I yam what I yam - Popeye

 

[Anthony William Sloman]

On Thursday, December 30, 2021 at 4:11:21 PM UTC+11, jla...@highlandsniptechnology.com wrote:

Version 4
SHEET 1 880 680
WIRE 480 -32 384 -32
WIRE 608 -32 560 -32
WIRE 608 80 608 -32
WIRE 608 80 544 80
WIRE 656 80 608 80
WIRE 688 80 656 80
WIRE -112 96 -160 96
WIRE -64 96 -112 96
WIRE 48 96 16 96
WIRE 80 96 48 96
WIRE 240 96 192 96
WIRE 272 96 240 96
WIRE 384 96 384 -32
WIRE 384 96 336 96
WIRE 432 96 384 96
WIRE 480 96 432 96
WIRE -160 144 -160 96
WIRE 80 144 80 96
WIRE 192 144 192 96
WIRE -160 256 -160 224
WIRE 80 256 80 224
WIRE 192 256 192 224
FLAG 80 256 0
FLAG 192 256 0
FLAG -160 256 0
FLAG 656 80 OUT
FLAG 432 96 G
FLAG 240 96 S
FLAG 48 96 P
FLAG -112 96 IN
SYMBOL ind2 64 128 R0
WINDOW 0 -53 39 Left 2
WINDOW 3 -60 70 Left 2
SYMATTR InstName L1
SYMATTR Value 10µ
SYMATTR Type ind
SYMBOL ind2 176 128 R0
WINDOW 0 56 34 Left 2
WINDOW 3 51 66 Left 2
SYMATTR InstName L2
SYMATTR Value 10µ
SYMATTR Type ind
SYMBOL res 32 80 R90
WINDOW 0 -40 54 VBottom 2
WINDOW 3 -34 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 464 -16 R270
WINDOW 0 -38 20 VTop 2
WINDOW 3 -10 94 VBottom 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage -160 128 R0
WINDOW 0 39 113 Left 2
WINDOW 3 -61 184 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 10n 5n 5n 10u 20u 10)
SYMBOL Digital\\\\schmitt 480 32 R0
WINDOW 0 15 116 Left 2
SYMATTR InstName A1
SYMATTR SpiceLine Vhigh=3.3 VT=1.65 VH=0.4 Td=5n
SYMBOL cap 336 80 R90
WINDOW 0 -48 30 VBottom 2
WINDOW 3 -39 29 VTop 2
SYMATTR InstName C1
SYMATTR Value 250p
TEXT 64 40 Left 2 !K1 L1 L2 0.98
TEXT 352 304 Left 2 !.tran 0 250u 0 1n
TEXT 360 208 Left 2 ;Logic Coupler
TEXT 352 256 Left 2 ;JL Dec 29 2021

Adding 1pF of parallel capacitance across each of L1 and L2 made the output look a lot less neat. I haven\'t dug in to work out why, but capacitance-free 10uH doesn\'t look too realistic.

It would be nice if John told us how he thought that he\'d get that. Presumably he has something off-the shelf from Coilcraft in mind. If it were wound with twisted pair it would have capacitance between the windings and the coupling might be better than 0.98 .

Two physically separated single layer windings on different parts of one core might do it.

--
Bill Sloman, Sydney

--
Bill Sloman, Sydney

 

[Anthony William Sloman]

On Thursday, December 30, 2021 at 5:15:17 PM UTC+11, Anthony William Sloman wrote:

On Thursday, December 30, 2021 at 4:11:21 PM UTC+11, jla...@highlandsniptechnology.com wrote:
Version 4
SHEET 1 880 680
WIRE 480 -32 384 -32
WIRE 608 -32 560 -32
WIRE 608 80 608 -32
WIRE 608 80 544 80
WIRE 656 80 608 80
WIRE 688 80 656 80
WIRE -112 96 -160 96
WIRE -64 96 -112 96
WIRE 48 96 16 96
WIRE 80 96 48 96
WIRE 240 96 192 96
WIRE 272 96 240 96
WIRE 384 96 384 -32
WIRE 384 96 336 96
WIRE 432 96 384 96
WIRE 480 96 432 96
WIRE -160 144 -160 96
WIRE 80 144 80 96
WIRE 192 144 192 96
WIRE -160 256 -160 224
WIRE 80 256 80 224
WIRE 192 256 192 224
FLAG 80 256 0
FLAG 192 256 0
FLAG -160 256 0
FLAG 656 80 OUT
FLAG 432 96 G
FLAG 240 96 S
FLAG 48 96 P
FLAG -112 96 IN
SYMBOL ind2 64 128 R0
WINDOW 0 -53 39 Left 2
WINDOW 3 -60 70 Left 2
SYMATTR InstName L1
SYMATTR Value 10µ
SYMATTR Type ind
SYMBOL ind2 176 128 R0
WINDOW 0 56 34 Left 2
WINDOW 3 51 66 Left 2
SYMATTR InstName L2
SYMATTR Value 10µ
SYMATTR Type ind
SYMBOL res 32 80 R90
WINDOW 0 -40 54 VBottom 2
WINDOW 3 -34 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 464 -16 R270
WINDOW 0 -38 20 VTop 2
WINDOW 3 -10 94 VBottom 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage -160 128 R0
WINDOW 0 39 113 Left 2
WINDOW 3 -61 184 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 10n 5n 5n 10u 20u 10)
SYMBOL Digital\\\\schmitt 480 32 R0
WINDOW 0 15 116 Left 2
SYMATTR InstName A1
SYMATTR SpiceLine Vhigh=3.3 VT=1.65 VH=0.4 Td=5n
SYMBOL cap 336 80 R90
WINDOW 0 -48 30 VBottom 2
WINDOW 3 -39 29 VTop 2
SYMATTR InstName C1
SYMATTR Value 250p
TEXT 64 40 Left 2 !K1 L1 L2 0.98
TEXT 352 304 Left 2 !.tran 0 250u 0 1n
TEXT 360 208 Left 2 ;Logic Coupler
TEXT 352 256 Left 2 ;JL Dec 29 2021

Adding 1pF of parallel capacitance across each of L1 and L2 made the output look a lot less neat. I haven\'t dug in to work out why, but capacitance-free 10uH doesn\'t look too realistic.

That\'s what I thought that I\'d done. When I started digging in I found out that what I\'d added was parallel resistance, and that did mess up circuit.

It would be nice if John told us how he thought that he\'d get that. Presumably he has something off-the shelf from Coilcraft in mind. If it were wound with twisted pair it would have capacitance between the windings and the coupling might be better than 0.98 .

Two physically separated single layer windings on different parts of one core might do it.

Years ago - around 1979 - I staked a ferrite core to a board with some eight u-shaped wire links. Half of them were the primary winding and the other half the isolated secondary, and I relied on a receiver with hysteresis to hold the square wave output beyond the time constant of the inductance. It was much slower - for process control - but worked fine.

--
> Bill Sloman, Sydney

 

[Sylvia Else]

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
> Version 4

<snip>

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

 

[legg]

On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid>
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL

 

[Phil Hobbs]

legg wrote:

On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL

Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[server]

On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid>
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

It has no internal clocks, so it\'s fast and has no jitter or EMI
sources. It\'s cheap. Its high-side static power requirement is zero.
And it\'s cute.

Fun circuits don\'t need use cases.



--

I yam what I yam - Popeye

 

[server]

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

Right. And most modulate/demodulate so have a lot of jitter.

One could make a very fast low-jitter optical isolator, but it would
be a big expensive power hog.



--

I yam what I yam - Popeye

 

[server]

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

That circuit was just a doodle. It would need tweaking in real life.
It\'s most elegant when the transformer time constant matches the
Schmitt feedback time constant, and when the final RC also damps any
leakage inductance ringing. That actually gets complex.

It really doesn\'t need a Schmitt gate, but it\'s nice.



--

I yam what I yam - Popeye

 

[John Larkin]

On Thu, 30 Dec 2021 09:08:03 -0500, legg <legg@nospam.magma.ca> wrote:

On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL

It\'s faster than most isolators, and is DC-coupled, after a powerup
priming shot.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon

 

[Phil Hobbs]

jlarkin@highlandsniptechnology.com wrote:

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

Right. And most modulate/demodulate so have a lot of jitter.

One could make a very fast low-jitter optical isolator, but it would
be a big expensive power hog.

And would have crappy latency compared with a coaxial transformer.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Phil Hobbs]

jlarkin@highlandsniptechnology.com wrote:

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.


That circuit was just a doodle. It would need tweaking in real life.
It\'s most elegant when the transformer time constant matches the
Schmitt feedback time constant, and when the final RC also damps any
leakage inductance ringing. That actually gets complex.

It really doesn\'t need a Schmitt gate, but it\'s nice.

That\'s one place where the common-gate GaN FET trick is good--it pretty
well ignores reasonable amounts of ringing. I need to try it out to see
if the body diode of the EPC parts is quick enough.

<https://www.ti.com/lit/an/snoaa36/snoaa36.pdf> has an interesting
discussion of how third-quadrant conduction works in GaN FETs, but
doesn\'t give any numbers.

It does make the point that the reverse conduction mechanism isn\'t a
diode as in vertical MOSFETs, but is just the channel turning on in the
reverse direction (drain and source exchanged).

That\'s all majority-carrier conduction, so there\'s no reverse recovery
issue, and since the channel turns on due to the gate voltage and not
diffusion, there should be no forward recovery delay either.

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[legg]

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

The drive function allowed low frequency modulation
using cheap small pulse transformer with minimal VT.

Many issues with this technique, but it had it\'s day.

RL

 

[legg]

On Thu, 30 Dec 2021 10:20:57 -0800, John Larkin
<jlarkin@highland_atwork_technology.com> wrote:

On Thu, 30 Dec 2021 09:08:03 -0500, legg <legg@nospam.magma.ca> wrote:

On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL

It\'s faster than most isolators, and is DC-coupled, after a powerup
priming shot.

you hope. . . . In circuits that can go boom, the issues aren\'t
just speed and data integrity.

In a two-transistor forward converter, there\'s a second series
switch that can police the circuit, without magnetics and restoration
issues. Bridge circuits not so lucky.

RL

 

[Phil Hobbs]

legg wrote:

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

The drive function allowed low frequency modulation
using cheap small pulse transformer with minimal VT.

Many issues with this technique, but it had it\'s day.

RL

Did you check out the LTspice file I posted with the common-gate GaN
FET? With a better transformer that looks like a pretty sweet solution.

Cheers

Phil Hobbs



--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[server]

On Thu, 30 Dec 2021 13:40:47 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

Cheers

Phil Hobbs

Right. And most modulate/demodulate so have a lot of jitter.

One could make a very fast low-jitter optical isolator, but it would
be a big expensive power hog.

And would have crappy latency compared with a coaxial transformer.

2 ns maybe could be done with a laser diode and a fast photodiode.

Cheers

Phil Hobbs

I was idly musing about making a dc-coupled optical link from SFP
modules. The trick would be to get the jitter below the data clock
period limit. FM or PWM or something.



--

I yam what I yam - Popeye

 

[server]

On Thu, 30 Dec 2021 13:54:42 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:

legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <sylvia@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jlarkin@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sylvia.

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

RL


Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.


That circuit was just a doodle. It would need tweaking in real life.
It\'s most elegant when the transformer time constant matches the
Schmitt feedback time constant, and when the final RC also damps any
leakage inductance ringing. That actually gets complex.

It really doesn\'t need a Schmitt gate, but it\'s nice.

That\'s one place where the common-gate GaN FET trick is good--it pretty
well ignores reasonable amounts of ringing. I need to try it out to see
if the body diode of the EPC parts is quick enough.

https://www.ti.com/lit/an/snoaa36/snoaa36.pdf> has an interesting
discussion of how third-quadrant conduction works in GaN FETs, but
doesn\'t give any numbers.

It does make the point that the reverse conduction mechanism isn\'t a
diode as in vertical MOSFETs, but is just the channel turning on in the
reverse direction (drain and source exchanged).

That\'s all majority-carrier conduction, so there\'s no reverse recovery
issue, and since the channel turns on due to the gate voltage and not
diffusion, there should be no forward recovery delay either.

Cheers

Phil Hobbs

Our lamented ATF-50189 made a fabulous diode in a couple of modes. D+G
against source, S+G against drain. 400 mV drop, 1 amp, 1 pF.

https://www.dropbox.com/s/4ql98sfpm6oarnd/Ephemt_Diode.JPG?raw=1

The SAV parts could be useful as diodes. Sims look promising, but I
haven\'t tried it for real.

(fix the wrap!)

Version 4
SHEET 1 1220 680
WIRE 224 -96 -96 -96
WIRE 528 -96 224 -96
WIRE -96 -64 -96 -96
WIRE 224 -48 224 -96
WIRE 528 -48 528 -96
WIRE -96 64 -96 16
WIRE 224 80 224 32
WIRE 272 80 224 80
WIRE 304 80 272 80
WIRE 528 80 528 32
WIRE 576 80 528 80
WIRE 608 80 576 80
WIRE 224 128 224 80
WIRE 528 128 528 80
WIRE 176 208 144 208
WIRE 480 208 432 208
WIRE 144 256 144 208
WIRE 224 256 224 224
WIRE 224 256 144 256
WIRE 432 256 432 208
WIRE 528 256 528 224
WIRE 528 256 432 256
WIRE 224 272 224 256
WIRE 528 272 528 256
FLAG 224 272 0
FLAG -96 64 0
FLAG 528 272 0
FLAG 272 80 D1
FLAG 576 80 D2
SYMBOL mesfet 176 128 R0
WINDOW 0 90 32 Left 2
WINDOW 3 67 62 Left 2
SYMATTR InstName Z1
SYMATTR Value SAV551
SYMBOL voltage -96 -80 R0
WINDOW 0 68 58 Left 2
WINDOW 3 59 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vd
SYMATTR Value SINE(0 20 1 0 0 8)
SYMBOL res 208 -64 R0
WINDOW 0 54 46 Left 2
WINDOW 3 53 77 Left 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 512 -64 R0
WINDOW 0 55 44 Left 2
WINDOW 3 56 73 Left 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL mesfet 480 128 R0
WINDOW 0 86 36 Left 2
WINDOW 3 62 64 Left 2
SYMATTR InstName Z2
SYMATTR Value SAV541
TEXT -168 328 Left 2 !.MODEL SAV551 NMF(vto=0.08, Beta=0.3,\\n+
Lambda=0.07, Alpha=4 B=0.8, Pb=0.7,\\n+ Cgs=0.997E-12, Cgd=0.176E-12,
Rd=0.084,\\n+ Rs=0.054, Kf=5e-11, Af=2)
TEXT -48 272 Left 2 !.tran 5
TEXT 344 328 Left 2 !.MODEL SAV541 NMF(vto=0.08, Beta=0.6,\\n+
Lambda=0.07, Alpha=4 B=0.8, Pb=0.7,\\n+ Cgs=0.997E-12, Cgd=0.176E-12,
Rd=0.084,\\n+ Rs=0.054, Kf=5e-11, Af=2)
TEXT -120 144 Left 2 ;SAV-541 and SAV-551
TEXT -64 176 Left 2 ;As Diodes
TEXT -104 224 Left 2 ;JL May 10 2021






--

I yam what I yam - Popeye

 

[Anthony William Sloman]

On Friday, December 31, 2021 at 4:20:09 AM UTC+11, jla...@highlandsniptechnology.com wrote:

On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs
pcdhSpamM...@electrooptical.net> wrote:
legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <syl...@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jla...@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

Or very fast edges are needed, as in the examples JL and I posted in the
\"CML-CML level shifter\" thread. Logic isolators don\'t go much faster
than 40 ns AFAICT.

That circuit was just a doodle. It would need tweaking in real life.

The transformer was very much a doodle. Every winding always has parallel capacitance, and even that didn\'t get into the LT Spice .asc file.

Since the test signal is just 50kHz. and the receiver is a generic LT Spice Schmitt trigger, it\'s not even much of a doodle.

> It\'s most elegant when the transformer time constant matches the Schmitt feedback time constant, and when the final RC also damps any leakage inductance ringing. That actually gets complex.

Elegance doesn\'t come into it

> It really doesn\'t need a Schmitt gate, but it\'s nice.

It probably does. The number of volt.seconds you can get through a transformer is limited by saturation. If you haven\'t put any thought into the transformer at all, you may not realise this.

--
Bill Sloman, Sydney

 

[Anthony William Sloman]

On Friday, December 31, 2021 at 5:21:07 AM UTC+11, John Larkin wrote:

On Thu, 30 Dec 2021 09:08:03 -0500, legg <le...@nospam.magma.ca> wrote:

On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <syl...@email.invalid
wrote:

On 30-Dec-21 4:11 pm, jla...@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator
wouldn\'t be suitable for?

Sometimes used in lower frequency isolated gate drive, when minimal
magnetics cost is the aim.

It\'s faster than most isolators, and is DC-coupled, after a power-up
priming shot.

Not a claim that\'s worth making for a purely theoretical transformer driving an LT Spice generic Schmitt trigger.

No parallel capacitance across either inductor, and no current induced in the transformer core - it\'s a little too theoretical too swank about.

It worked fine when I did it in 1979, but I wasn\'t around to see it go into production (if it did).

--
Bill Sloman, Sydney

 

[Anthony William Sloman]

On Friday, December 31, 2021 at 1:54:28 PM UTC+11, jla...@highlandsniptechnology.com wrote:

On Thu, 30 Dec 2021 13:54:42 -0500, Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote: jla...@highlandsniptechnology.com wrote:
On Thu, 30 Dec 2021 10:22:06 -0500, Phil Hobbs <pcdhSpamM...@electrooptical.net> wrote:
legg wrote:
On Thu, 30 Dec 2021 19:04:22 +1100, Sylvia Else <syl...@email.invalid> wrote:
On 30-Dec-21 4:11 pm, jla...@highlandsniptechnology.com wrote:
Version 4

snip

What is the use-case for this that a conventional digital isolator wouldn\'t be suitable for?

Sometimes used in lower frequency isolated gate drive, when minimal magnetics cost is the aim.

Or very fast edges are needed, as in the examples JL and I posted in the \"CML-CML level shifter\" thread. Logic isolators don\'t go much faster than 40 ns AFAICT.

That circuit was just a doodle. It would need tweaking in real life. It\'s most elegant when the transformer time constant matches the Schmitt feedback time constant, and when the final RC also damps any leakage inductance ringing. That actually gets complex.

It really doesn\'t need a Schmitt gate, but it\'s nice.

That\'s one place where the common-gate GaN FET trick is good--it pretty
well ignores reasonable amounts of ringing. I need to try it out to see
if the body diode of the EPC parts is quick enough.

https://www.ti.com/lit/an/snoaa36/snoaa36.pdf> has an interesting
discussion of how third-quadrant conduction works in GaN FETs, but
doesn\'t give any numbers.

It does make the point that the reverse conduction mechanism isn\'t a
diode as in vertical MOSFETs, but is just the channel turning on in the
reverse direction (drain and source exchanged).

That\'s all majority-carrier conduction, so there\'s no reverse recovery
issue, and since the channel turns on due to the gate voltage and not
diffusion, there should be no forward recovery delay either.


Our lamented ATF-50189 made a fabulous diode in a couple of modes. D+G
against source, S+G against drain. 400 mV drop, 1 amp, 1 pF.

https://www.dropbox.com/s/4ql98sfpm6oarnd/Ephemt_Diode.JPG?raw=1

The SAV parts could be useful as diodes. Sims look promising, but I
haven\'t tried it for real.

(fix the wrap!)

Snipped the .asc file. I could fix the wrap, but whatever symbol John inserted for his SAV parts didn\'t make it. The models were there - as strings of text - but not as any kind of manipulable component, even after I\'d let LT Spice update itself.

I suppose I could try to generate symbols to latch on to the SAV541 and SAV541 data, but it doesn\'t strike me as a sensible use for my time.

--
Bill Sloman, Sydney