traffic light controller

[Dan]

Hi,

I'm synthesizing a traffic light controller in VHDL and right now I use

001 -> Red
010 -> Yellow
100 -> Green

When I simulate the design in ModelSIM, I would like to show the word "Red"
instead of "001" and so on. How is this possible?

Thanks

 

[KJ]

"Dan" <nomail@noserver.com> wrote in message
news:fhn9p3$4bh$1@nsnmrro2-gest.nuria.telefonica-data.net...

Hi,

I'm synthesizing a traffic light controller in VHDL and right now I use

001 -> Red
010 -> Yellow
100 -> Green

When I simulate the design in ModelSIM, I would like to show the word
"Red" instead of "001" and so on. How is this possible?

Thanks

Define a new type that has the list of enumerations (i.e. list of light
colors). Below is sample code that
- Defines such a type
- Declares a signal of that type
- Sets the value of that signal to be 'Red'.

Modelsim will display the signal as 'Red'.

architecture RTL of Whatever is
type t_TRAFFIC_LIGHT is (Red, Yellow, Green);
signal Current_Light_Color: t_TRAFFIC_LIGHT;
begin
Current_Light_Color <= Red;
end RTL;

KJ

 

[Darol Klawetter]

OnI Nov 17, 11:52 am, "Dan" <nom...@noserver.com> wrote:

Hi,

I'm synthesizing a traffic light controller in VHDL and right now I use

001 -> Red
010 -> Yellow
100 -> Green

When I simulate the design in ModelSIM, I would like to show the word "Red"
instead of "001" and so on. How is this possible?

Thanks

ModelSim will show the state-machine state names if you select the
correct display format option. I would look it up for you, but I don't
have ModelSIM with me right now. In your VHDL, use the "constant"
keyword to associate 001 with "Red", etc.