S
Shenli
Guest
Hi all,
I am new to ASIC synthesis area and have some experience on FPGA
synthesis(know most of the detail principle of synthesis).
But I don't know the big picture of the synthesis. For example, my
friends told me most of user of DC use top-bottom synthesis
methodology (is it right?). And I want to get a intuitive knowledge
of
it.
Please recommend some synthesis paper talk about the big picture like
top-bottom methodology (from SNUG or others). Thanks in advance!
Best regards,
Shenli
I am new to ASIC synthesis area and have some experience on FPGA
synthesis(know most of the detail principle of synthesis).
But I don't know the big picture of the synthesis. For example, my
friends told me most of user of DC use top-bottom synthesis
methodology (is it right?). And I want to get a intuitive knowledge
of
it.
Please recommend some synthesis paper talk about the big picture like
top-bottom methodology (from SNUG or others). Thanks in advance!
Best regards,
Shenli