S
Stephen Williams
Guest
The Icarus Verilog -tfpga is gaining generic LPM family support,
to be used as a least common demoninator default library. It is
of course always nice to test software I write, so I'm on the
hunt for tools that read in EDIF netlists that use LPM devices.
I'd be highly biased towards Linux software. I have Windows 2000
off to the side here, but it's a chore.
Ideally, the software that can read my EDIF/LPM output would be
able to in turn emit Verilog that I can use to regression test
my code generator and synthesizer.
Any suggestions?
(I have a feeling Altera and Lattice may support this sort of
thing, but I hate IDEs and I *hate* MS Windows.)
--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,
http://www.icarus.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep."
to be used as a least common demoninator default library. It is
of course always nice to test software I write, so I'm on the
hunt for tools that read in EDIF netlists that use LPM devices.
I'd be highly biased towards Linux software. I have Windows 2000
off to the side here, but it's a chore.
Ideally, the software that can read my EDIF/LPM output would be
able to in turn emit Verilog that I can use to regression test
my code generator and synthesizer.
Any suggestions?
(I have a feeling Altera and Lattice may support this sort of
thing, but I hate IDEs and I *hate* MS Windows.)
--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,
http://www.icarus.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep."