P
Pavan Chakravarthy
Guest
how to send this data in verilog...
I have a problem with the below logic....
at 1st clk
input "a" should give 1 bit output "1"
at 2nd clk
"a" should concatanate this 7 bit output "0000001" and give
"10000001"
at 3rd clk it shoud again coancatenate "1" and should give output
"100000011"
can anyone tell the code for this logic....
I have a problem with the below logic....
at 1st clk
input "a" should give 1 bit output "1"
at 2nd clk
"a" should concatanate this 7 bit output "0000001" and give
"10000001"
at 3rd clk it shoud again coancatenate "1" and should give output
"100000011"
can anyone tell the code for this logic....