To infer or not to infer

D

DW

Guest
Hello,
I'm using Altera Quartus 2 to produce FPGA based designs. My question is
whether I should infer memory arrays in my modules (which I think I prefer
to do because it seems natural to do so and it seems to work OK so far) or
to use the wizard to create separate memory modules and then call these up
in my Verilog code.

I'm sure there are pro's and con's but would be interested to hear from
anyone with relevant experience and advice.
Thanks,
DW
 
You need to check if the inferred memory is implemented using LEs or
using the ESBs. If ESBs are used then I guess there is no problem.
If LEs are used and if you have occupancy problems then it is better
to instantiate Altera memory modules.
 
I'm pretty sure that Quartus is intelligent enough to use the appropriate
form and I think there may well be some control over this. It seems to me
that one big advantage of inferring the memory is that the size of the
memory can be parameterised so each instance can be different, although I
will have to check if this can be done by using wizard generated memory
modules.

"Kiran" <kirandev@msn.com> wrote in message
news:9043844f.0404272059.44b8f4f0@posting.google.com...
You need to check if the inferred memory is implemented using LEs or
using the ESBs. If ESBs are used then I guess there is no problem.
If LEs are used and if you have occupancy problems then it is better
to instantiate Altera memory modules.
 

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