timescale in gate-level simulation

Is it true that for gate-level simulation there should be constant
timescale throughout the simulation?
(and not different timescales in different files)

 

[Rajkumar]

On Jan 26, 8:37 am, pazi...@gmail.com wrote:

Is it true that for gate-level simulation there should be constant
timescale throughout the simulation?
(and not different timescales in different files)

Hi,
Timescale directive is used to setup the timings for that module, and
it remains in force until overridden by the next such directive.
So having multiple timescale's setup for each module may not be a good
idea, normally 1 timescale is specified in a file called timescale.v
and this file is included in all the modules so as to have consistent
timescale across the modules.
But it is also possible to have timescales defined in various modules,
provided you know what you are doing.

Rajkumar...

 

[gabor]

On Jan 26, 9:36 pm, Rajkumar <shubamshre...@gmail.com> wrote:

On Jan 26, 8:37 am, pazi...@gmail.com wrote:

Is it true that for gate-level simulation there should be constant
timescale throughout the simulation?
(and not different timescales in different files)

Hi,
Timescale directive is used to setup the timings for that module, and
it remains in force until overridden by the next such directive.
So having multiple timescale's setup for each module may not be a good
idea, normally 1 timescale is specified in a file called timescale.v
and this file is included in all the modules so as to have consistent
timescale across the modules.
But it is also possible to have timescales defined in various modules,
provided you know what you are doing.

Rajkumar...

You could go by the simple rule - put a timescale directive
in every module. Then you should not need to worry about
differences in timescale. If you have different timescales
but also have some modules without a timescale directive,
those modules will have an indeterminate timescale (it
depends on compile order), and this is where you run into
problems. ModelSim gives warnings when some of your
modules have timescale directives and others don't.