time set up

A

Andres

Guest
Hi everyone!!!

I'm actually doing my thesis wich consists in implementing an algorithm in a
FPGA. I've done the desing and works right in all the simulations except in
Post Place and Route simulation. In fact, the results are right but betwen
every 2 data appears valid data that shouldn't appear. What should I do? How
can I fix it ? Should I have to manipulate the set up time of the elements ?
How can I do that?

I'm using ISE 5.1 and ModelSim XE II v5.6e.

Thanks
 
Andres wrote:
Hi everyone!!!

I'm actually doing my thesis wich consists in implementing an algorithm in a
FPGA. I've done the desing and works right in all the simulations except in
Post Place and Route simulation. In fact, the results are right but betwen
every 2 data appears valid data that shouldn't appear.
What do you see on the functional sim then? zeros? 'Z's ?
What do want to see?

What should I do? How can I fix it ?
Watch waves, trace code, edit code, repeat


-- Mike Treseler
 

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