M
mahalingamv@gmail.com
Guest
Hi all,
Does anyone have a TILOS (timed logic synthesis) circuit sizing tool.
Its one of the popular iterative circuit optimization framework
published by fishburn and dunlop in 1985. Several other improvements
and modifications to the same have also been proposed, any of the older
or later versions will also be appreciated.
Any details on online version or some direction where I could get it
from would be greatly appreciated.
Mahalingam
Graduate Student
CSE, USF
Does anyone have a TILOS (timed logic synthesis) circuit sizing tool.
Its one of the popular iterative circuit optimization framework
published by fishburn and dunlop in 1985. Several other improvements
and modifications to the same have also been proposed, any of the older
or later versions will also be appreciated.
Any details on online version or some direction where I could get it
from would be greatly appreciated.
Mahalingam
Graduate Student
CSE, USF