There is no default binding for component

[Valentin Tihomirov]

Is it considered a good pracice to have default bindings? My simulator shows
this warning analysing vhdl files all the time. Very annoying, cos I prefer
"no warnings" message.

 

[Peter Molesworth]

On Fri, 7 Nov 2003 21:31:53 +0200, Valentin Tihomirov
<valentin@abelectron.com> wrote:

Is it considered a good pracice to have default bindings? My simulator
shows
this warning analysing vhdl files all the time. Very annoying, cos I
prefer
"no warnings" message.

Valentin,

Are your sims working okay? This warning usually means that you have a
port mismatch between a component you are trying to instanciate and the
entity that is compiled into the work library. Alternatively the entity
might not exist in the library at all. If you are using a modelsim project
it could be something as simple as having the compile order specified
incorrectly so a higher level block is compiled/recompiled before a lower
level one it uses so if you have made a change to the entity it will give
this error.

Cheers,

Pete.

 

[Pieter Hulshoff]

Is it considered a good pracice to have default bindings? My simulator
shows this warning analysing vhdl files all the time. Very annoying, cos I
prefer "no warnings" message.

I used to not care too much about this, but I've started using configuration
files a couple of years ago. Default bindings can create trouble when used
in combination with an entity with multiple architectures. Default bindings
will probably take the last compiled one, which is not necessarily the one
you'd like to be using (as I found out after a few days of testing).

Regards,

Pieter Hulshoff

 

[Valentin Tihomirov]

I've faced lots of problems with configurations using ModelSimXE. Now I use
ActiveHDL and it has full support of configuration objects. Simulations work
perfectly, I just worry about warnings.

 

[Valentin Tihomirov]

Are your sims working okay? This warning usually means that you have a
port mismatch between a component you are trying to instanciate and the
entity that is compiled into the work library. Alternatively the entity
might not exist in the library at all.

Hm, when I instantiate a component I should not have an entity with the same
name. The compiler warns I would better have one. My question is, is
analyzer right enforcing me default entity?

 

[David R Brooks]

Does XST now support configurations properly? XST 4.2 used not to.

"Valentin Tihomirov" <valentin@abelectron.com> wrote:

:I've faced lots of problems with configurations using ModelSimXE. Now I use
:ActiveHDL and it has full support of configuration objects. Simulations work
erfectly, I just worry about warnings.
:

 

[Valentin Tihomirov]

I understand why you don't. It is not just simple. It may take many hours to
check all possible combinations. Search for relevant Xilinx Answers
typically follows this. Eventually, you realize that the answers are
incorrect. Thanx to me Xilinx has closed two misleading Xilinx Answers last
week. Both about handling configuration in VHDL.

The first thing is about binding one of multiple architectures to entity for
synthesis:
http://www.xilinx.com/xlnx/xil_ans_display.jsp?BV_SessionID=@@@@0682374355.1068336871@@@@&BV_EngineID=cccfadcjldekeiecflgcefldfgldgji.0&getPagePath=4969
In fact, the problem still persists in ISE6.1. It is scheduled to be fixed
in one of the next software releases.

Using configuration for binding components to entities does not work as
well.