The Fifo in xapp258

  • Thread starter Kjetil Eriksen Vistnes
  • Start date
K

Kjetil Eriksen Vistnes

Guest
I'm using the Fifo in Xilinx application note xapp258,and
the following problem occurs during Behavioral simulation:

The last value in the queue doesn't read out. The same thing happens
if I'm
writing only one value to the queue, and sets "read_enable_in" high for
one clock cycle: No data
out. A burst read on eg. the last elements in the Fifo reads out perfectly
fine. The last element is beeing read out.

Is it something I'm doing wrong in simulation?
Have anyone had this problem with this Fifo or know a solution to it?

Kjetil Vistnes
 
Kjetil Eriksen Vistnes <kjetiler@ifi.uio.no> wrote in message news:<Pine.GSO.4.58.0401121727170.28477@geirrod.ifi.uio.no>...
I'm using the Fifo in Xilinx application note xapp258,and
the following problem occurs during Behavioral simulation:

The last value in the queue doesn't read out. The same thing happens
if I'm
writing only one value to the queue, and sets "read_enable_in" high for
one clock cycle: No data
out. A burst read on eg. the last elements in the Fifo reads out perfectly
fine. The last element is beeing read out.

Is it something I'm doing wrong in simulation?
Have anyone had this problem with this Fifo or know a solution to it?

Kjetil Vistnes
Not sure what the problem with the Xilinx FIFOs is, but
check out the free FIFOs available on OpenCores, they
are also technology independent and can be used with
Altera, Xilinx and any Std. Cell process:

http://www.opencores.org/projects/generic_fifos/

Regards,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
...............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/ <- FREE EDA Tools
 

Welcome to EDABoard.com

Sponsor

Back
Top