P
Pasacco
Guest
I am learning using textio library.
I have source code and test bench. Both of them are compiled well.
Test bench looks like below.
-------------------------
....
architecture
....
file AAA : TEXT open READ_MODE is "text.txt";
begin
....
process
begin
...
while NOT (endfile(AAA)) loop -- here occurs error
...
-------------------------
I am using modelsim and met the following error message. It is strange
that it tries to open VHDL file instead of TXT file...and also strange
because there IS a text file in the directory.....
-----------------------------------------------------------------
Fatal: (vsim-7) Failed to open VHDL file "text.txt" in r mode.
# No such file or directory. (errno = ENOENT)
-----------------------------------------------------------------
If someone has this experience, let us know how to solve...
Thankyou
I have source code and test bench. Both of them are compiled well.
Test bench looks like below.
-------------------------
....
architecture
....
file AAA : TEXT open READ_MODE is "text.txt";
begin
....
process
begin
...
while NOT (endfile(AAA)) loop -- here occurs error
...
-------------------------
I am using modelsim and met the following error message. It is strange
that it tries to open VHDL file instead of TXT file...and also strange
because there IS a text file in the directory.....
-----------------------------------------------------------------
Fatal: (vsim-7) Failed to open VHDL file "text.txt" in r mode.
# No such file or directory. (errno = ENOENT)
-----------------------------------------------------------------
If someone has this experience, let us know how to solve...
Thankyou
