Testbench HowTo Apply Hex Values from a File

[Markus Meng]

Hi all,

I need a short hint howto get the Hex-Values out of the line below
for simulation purpose. The input is of type std_logic_vector(15 downto 0)

-- a few lines from the file I read
-- I use the readline function to read one line at once using
readline(vector_file, inline);
-- now I would like to have the ten hex values per line in 10 variables ...

X"0000" X"8000" X"8000" X"8000" X"8000" X"8000" X"80fa" X"81f4" X"92ee"
X"c001"
X"0000" X"8001" X"8000" X"8001" X"c002" X"9001" X"90fb" X"91f5" X"82ef"
X"8003"
X"0000" X"8002" X"8000" X"8002" X"c004" X"9002" X"80fc" X"91f6" X"92f0"
X"8005"
X"0000" X"8003" X"8000" X"8003" X"8006" X"8003" X"90fd" X"81f7" X"82f1"
X"c007"
X"0000" X"8004" X"8000" X"8004" X"c008" X"9004" X"90fe" X"81f8" X"82f2"
X"8009"
X"0000" X"8005" X"8000" X"8005" X"800a" X"8005" X"80ff" X"91f9" X"92f3"
X"c00b"
X"0000" X"8006" X"8000" X"8006" X"800c" X"8006" X"9100" X"91fa" X"82f4"
X"c00d"
X"0000" X"8007" X"8000" X"8007" X"c00e" X"9007" X"8101" X"81fb" X"92f5"
X"800f"
X"0000" X"8008" X"8000" X"8008" X"c010" X"9008" X"8102" X"91fc" X"92f6"
X"8011"

Best regards
Markus

--
Mit freundlichen Grüssen
Markus Meng

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[Mike Treseler]

Markus Meng wrote:

Hi all,

I need a short hint howto get the Hex-Values out of the line below
for simulation purpose. The input is of type std_logic_vector(15 downto 0)

-- a few lines from the file I read
-- I use the readline function to read one line at once using
readline(vector_file, inline);
-- now I would like to have the ten hex values per line in 10 variables ...

Consider using a vhdl constant as shown below.
-- Mike Treseler

----------------------------------------------------
-- Example of driving test vectors without textio.
-- Mike Treseler Thu Jan 15 10:37:11 2004
library ieee;
use ieee.std_logic_1164.all;

entity tb_vectors is
generic (vec_len : natural := 16);
end entity tb_vectors;

architecture sim of tb_vectors
is
subtype tb_vec is std_logic_vector(vec_len-1 downto 0);
signal vec_out : tb_vec;

type tb_vector is array (natural range <&gt of
std_logic_vector(vec_len-1 downto 0);

constant this_rom : tb_vector :=
(
X"0000", X"8000", X"8000", X"8000", X"8000",
X"8000", X"80fa", X"81f4", X"92ee", X"c001",
X"0000", X"8001", X"8000", X"8001", X"c002",
X"9001", X"90fb", X"91f5", X"82ef", X"8003",
X"0000", X"8002", X"8000", X"8002", X"c004",
X"9002", X"80fc", X"91f6", X"92f0", X"8005",
X"0000", X"8003", X"8000", X"8003", X"8006",
X"8003", X"90fd", X"81f7", X"82f1", X"c007",
X"0000", X"8004", X"8000", X"8004", X"c008",
X"9004", X"90fe", X"81f8", X"82f2", X"8009",
X"0000", X"8005", X"8000", X"8005", X"800a",
X"8005", X"80ff", X"91f9", X"92f3", X"c00b",
X"0000", X"8006", X"8000", X"8006", X"800c",
X"8006", X"9100", X"91fa", X"82f4", X"c00d",
X"0000", X"8007", X"8000", X"8007", X"c00e",
X"9007", X"8101", X"81fb", X"92f5", X"800f",
X"0000", X"8008", X"8000", X"8008", X"c010",
X"9008", X"8102", X"91fc", X"92f6", X"8011"
);

begin
main : process is
begin
mk_vec : for i in this_rom'range loop
vec_out <= this_rom(i);
wait for 10 ns;
end loop mk_vec;
wait;
end process main;
end architecture sim;