Test vector generation for ethernet frame using VHDL

Hi,

I need to know how do we go about generating a test vector for an
ethernet frame. We r using the CPCS core that generates the ethernet
data. but for our testing purpose i need to drive the output signal to
a GFP framer. So i wud like to know how to generate the ethernet frame.
Are there any existing codes for this purpose.

thanking u
raj

 

[Mike Treseler]

rajalakshmisahoo@gmail.com wrote:

I need to know how do we go about generating a test vector for an
ethernet frame. We r using the CPCS core that generates the ethernet
data.

Most cores come with some sort
of sample testbench.
Have a look at the data sheet.

but for our testing purpose i need to drive the output signal to
a GFP framer. So i wud like to know how to generate the ethernet frame.

Ethernet interfaces have a
high speed 4 or 8 bit TX, RX bus.
There is normally a MAC core also for
with a buffered processor interface.
You can capture sample frames using
http://www.ethereal.com/

Are there any existing codes for this purpose.

Check with the core supplier.
No one else would be likely have time
to provide free reference designs.

-- Mike Treseler