SystemVerilog cross-module reference resolution error

I am developing some testbench code and I am seeing a cross-module
resolution error. Specifically,

Error-[XMRE] Cross-module reference resolution error
Cross module resolution failed. Originating module
'top_level_program'.
"
BfmPhy.sv
", 308: this.cmdTable


cmdTable is an array of 'cmd' objects. The table is declared in a
parent class and is being used in a derived class. When trying to
index into the cmdTable with the following code fragement, I see the
error.
cmdTable(acrtag).copy

Any ideas as to what I should consider or any pointers to
documentation on errors in SystemVerilog?

 

As there is no code attached, I am forced to guess here. I think the
issue is with array element access; by mistake you must have used ()
instead of []. With that it works fine.

 

[mmintz@gmail.com]

I'll venture another guess. You might have the cmdTable declared local
in the parent class.


On Mar 21, 5:47 am, aniruddha....@gmail.com wrote:

As there is no code attached, I am forced to guess here. I think the
issue is with array element access; by mistake you must have used ()
instead of []. With that it works fine.