system verilog virtual interface

[rushi]

hi

can anybody explain the concept of virtual interface in system verilog
with any example?


rushi

 

[Jonathan Bromley]

On 22 Dec 2006 22:08:15 -0800, "rushi" <keshavsjoshi@gmail.com> wrote:

can anybody explain the concept of virtual interface in system verilog
with any example?

A virtual interface is a variable that can hold a reference to an
existing interface instance.

Typically, you would build a class representing some part of
your verification environment. This class would have a
virtual interface variable, and at runtime (maybe as part of
the class's constructor) you set this variable to be equal to
the instance name of some interface instance in your
simulation. The object can thus manipulate any suitable
interface instance, and can even re-connect itself to a
different instance some time during the run if it chooses.

There are plenty of tutorial examples in the VMM book
and in Mentor's AVM Cookbook.

--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
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Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[Shenli]

Hi,

Virtual interface has one major advantage, you can dynamically bond the
interface to the transactor (transaction layer to pin layer translator)
by the class new() function. Which means you can pass the interface
information when generate the class object (which means dynamic).

Guess if we only have interface instance and don't have virtual
interface, we have to bond the interface by instance it and now the
interface instance is determined before we generate the class object
(which means static).

I think I have posted the question before on this board and some good
people answered me. So please search the board.

Regards,
Davy

rushi wrote:

hi

can anybody explain the concept of virtual interface in system verilog
with any example?


rushi