S
Shamik
Guest
Is there a open source System Verilog parser till date ?
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A
Amal
Guest
On Jul 4, 12:45 am, Shamik <shamik.gang...@gmail.com> wrote:
http://www.antlr.org/grammar/verilog/verilog.g
This just does basic grammar check and whether your input file is
valid Verilog or not.
You can extend this to SystemVerilog and add your tree parser, or
other grammar manipulations/transformations, ...
-- Amal
You can find a Verilog grammar in ANTLR format here:Is there a open source System Verilog parser till date ?
http://www.antlr.org/grammar/verilog/verilog.g
This just does basic grammar check and whether your input file is
valid Verilog or not.
You can extend this to SystemVerilog and add your tree parser, or
other grammar manipulations/transformations, ...
-- Amal
S
Shamik
Guest
On Jul 4, 8:25 pm, Amal <akhailt...@gmail.com> wrote:
Thanks a lot AmalOn Jul 4, 12:45 am, Shamik <shamik.gang...@gmail.com> wrote:
Is there a open source System Verilog parser till date ?
You can find a Verilog grammar in ANTLR format here:
http://www.antlr.org/grammar/verilog/verilog.g
This just does basic grammar check and whether your input file is
valid Verilog or not.
You can extend this to SystemVerilog and add your tree parser, or
other grammar manipulations/transformations, ...
-- Amal