System verilog interfaces instantiations

[Michael]

Hi,

I haven't found the answer to my question, so possibly somebody
already knows it.

I have following hierarchy:
(level0) TOP
(level1) module1
(level2) module2

I want to pass the "interface" from level2 to the TOP. The additional
constraint is that interface has a parameter.

How can I do that?
module TOP(top inputs/outputs);
MyInterface #(10) intf;
module1 (
.intf(intf)
);
endmodule

module module1(
MyInterface intf
);

module2 module2(
.intf(intf)
);
endmodule

How the "#(10)" can be defined in module1 instantiation and
definition?

Thanks.