System Generator HDL co-simulatin problem

O

Oleg

Guest
Hi,
I am using system generator 6.1 withing Matlab 13 and ISE 6.1 and
modelsim 5.7d. When i run a HDL co-simulation of my black box(imported
VHDL to black box), the modelsim shows the following error: the
communication interface timeout, simulation halted.....and all
Matlab's windows hangs up indefinitly.
When i simulate my imported VHDL entity in black box it doesnt react
to the stimulus generated by simulink. I can see the test vectors
applied by simulink to my black box but this one doesnt react (output
= 0 all time)
Thanks for any help
 
Oleg,

In Altera DSPBuilder I have found that it is not possible to simulate
external VHDL, if I want simulation I have to fill in the black box with
equivalent model built out of Simulink _or_ Altera blocks. I would be
very interested to know if System Generator supports simulation of external
VHDL.

However Matlab and Mentor have a product available that allows running
ModelSim VHDL and Verilog simulations from Matlab+Simulink.

http://www.mathworks.com/company/pressroom/articles/article7062.html

http://www.mathworks.com/products/modelsim/

I'm also interested to hear your overall experience and satisfaction with
SystemGenerator, online or off.

Regards,
-rajeev-
---------------
benkhalh@hotmail.com (Oleg) wrote in message news:<5f8ab9cc.0404141146.31389696@posting.google.com>...
Hi,
I am using system generator 6.1 withing Matlab 13 and ISE 6.1 and
modelsim 5.7d. When i run a HDL co-simulation of my black box(imported
VHDL to black box), the modelsim shows the following error: the
communication interface timeout, simulation halted.....and all
Matlab's windows hangs up indefinitly.
When i simulate my imported VHDL entity in black box it doesnt react
to the stimulus generated by simulink. I can see the test vectors
applied by simulink to my black box but this one doesnt react (output
= 0 all time)
Thanks for any help
 
Oleg,

If ModelSim does not open at all usually this is an indication that the
ModelSim path is not setup correctly.

If ModelSim does open, failures of this sort can be related to the
amount of time required to launch the ModelSim process and for it to get
through its startup and to communicate back to Sysgen. The delay can be
a function of processor speed, local vs. network installation, licensing
issues, etc. Sysgen v6.1 is set to wait to hear from ModelSim for a
fixed period of time and if this time is exceeded then this error will
be seen in Sysgen.

To improve load time try moving ModelSim to the front of your path and
license environment variables.

Later,
Chris


Oleg wrote:

Hi,
I am using system generator 6.1 withing Matlab 13 and ISE 6.1 and
modelsim 5.7d. When i run a HDL co-simulation of my black box(imported
VHDL to black box), the modelsim shows the following error: the
communication interface timeout, simulation halted.....and all
Matlab's windows hangs up indefinitly.
When i simulate my imported VHDL entity in black box it doesnt react
to the stimulus generated by simulink. I can see the test vectors
applied by simulink to my black box but this one doesnt react (output
= 0 all time)
Thanks for any help
 
Rajeev,

System Generator for DSP now supports HDL Co-Simulation using ModelSim.
This allows you to BlackBox your HDL, and bring it into Simulink. When you
simulate the design, ModelSim is called by SysGen in order to simulate
the HDL.

You can find out more informaiton here.
http://support.xilinx.com/products/software/sysgen/features.htm#importing

Later,
Chris


Rajeev wrote:

Oleg,

In Altera DSPBuilder I have found that it is not possible to simulate
external VHDL, if I want simulation I have to fill in the black box with
equivalent model built out of Simulink _or_ Altera blocks. I would be
very interested to know if System Generator supports simulation of external
VHDL.

However Matlab and Mentor have a product available that allows running
ModelSim VHDL and Verilog simulations from Matlab+Simulink.

http://www.mathworks.com/company/pressroom/articles/article7062.html

http://www.mathworks.com/products/modelsim/

I'm also interested to hear your overall experience and satisfaction with
SystemGenerator, online or off.

Regards,
-rajeev-
---------------
benkhalh@hotmail.com (Oleg) wrote in message news:<5f8ab9cc.0404141146.31389696@posting.google.com>...


Hi,
I am using system generator 6.1 withing Matlab 13 and ISE 6.1 and
modelsim 5.7d. When i run a HDL co-simulation of my black box(imported
VHDL to black box), the modelsim shows the following error: the
communication interface timeout, simulation halted.....and all
Matlab's windows hangs up indefinitly.
When i simulate my imported VHDL entity in black box it doesnt react
to the stimulus generated by simulink. I can see the test vectors
applied by simulink to my black box but this one doesnt react (output
= 0 all time)
Thanks for any help
 
rajeev wrote :
In Altera DSPBuilder I have found that it is not possible to simulate
external VHDL, if I want simulation I have to fill in the black box with
equivalent model built out of Simulink _or_ Altera blocks. I would be
very interested to know if System Generator supports simulation of external
VHDL.
Yes you can simulat imported VHDL in to black box using system
generator i done it many time in univesity computer but i dont know
why i can do so in other computer containing same required
softwares...???

rajeev wrote :

However Matlab and Mentor have a product available that allows running
ModelSim VHDL and Verilog simulations from Matlab+Simulink.
Yes its good tool but it can only simulat your design. System
generator can also (after you simulat your design to make sure it work
correctly) implement you design in the FPGA and make a test
(simulation) in the hardwar which is caled hardward co-simulation.

Regards
 

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