System generator and Microblaze

[Si]

Hi,

I am fairly new to Xilinx!
I am looking to implement a System generator (SG) design with a
Microblaze IP! How would one do this as I am a wear Xilinx does not
provide intrinsic support for the PPC405 (V-II Pro) or Microblaze in
SG?
To do this, should one pull the design into EDK/XPS and implement the
embedded design from there? What technique should I use to pull the
design into EDK, if it's the case that I have to build MPD, PAO and
BBD definitions along with VHDL definitions (does this take much
time?) for the SG design would I not be better building my designs in
Core Generator rather than SG?

Regards

Si

 

[John Williams]

Hi Si,

Si wrote:

I am fairly new to Xilinx!
I am looking to implement a System generator (SG) design with a
Microblaze IP! How would one do this as I am a wear Xilinx does not
provide intrinsic support for the PPC405 (V-II Pro) or Microblaze in
SG?

try XAPP264 - Building OPB Slave Peripherals using System Generator

Regards,

John