synthesis

[Abbs]

Hi.
i wanted a help from this group.i'am currently working on synthesis and
need some articles or material how to proceed with the synthesis. for
example.. once we have designed a vhdl code. verified the output in
testbench. how do we proceed next. synthesis is the next step if 'am
not wrong. we get the synthesis report..
but if i get info on how synthesis is done and the design flow,
explaiing the steps to be performed explaiing how to carry out till the
design is ported on the hardware. so i can learn and get more idea on
the same..

Thanks in advance.
HOPE TO GET A GOOD RESPONSE...
chears

AbbS

 

[Mike Treseler]

Abbs wrote:

example.. once we have designed a vhdl code. verified the output in
testbench. how do we proceed next. synthesis is the next step if 'am
not wrong.

For a synchronous design,
synthesis is a detail
compared to writing, simulating
and debugging your vhdl code.

For a first pass, you pick a device and
a directory, list the source files, push
a button. When it's done, start the hdl viewer
and see how it did.

-- Mike Treseler