Synthesis?

[Jason D. Bakos]

Hi everyone!

We currently use the ICFB suite (Viruoso/Analog Artist) to do extensive
schematic/layout design as well as simulation. However, I was wondering
if there was any mechanism within these tools to perform any of the
following:

- synthesis flow from VHDL, or
- assuming synthesis was performed with a third-party tool, use the
Cadence tools to represent particular components with a netlist (such as
an EDF-formatted netlist) for purposes of simulation in Analog Artist.

I assume you can do the latter task using the Hierarchy Editor, but I
haven't been able to try this as yet.

Also, assuming the ICFB tools can do VHDL synthesis, is there a way to
define custom technology libraries using specified standard
logic/memory/driver cells?

Thanks in advance,
-Jason

 

[Andrew Beckett]

There are various tools for doing Synthesis on the market, although none of
these are part of the "icfb" toolset.

For example:

RTL Compiler (Cadence)
BuildGates (Cadence)
Design Compiler (Synopsys)

You can import a VHDL netlist or Verilog Netlist using
File->Import->VHDL/Verilog. Also, there is a Cadence Synopsys Interface (under
the Tools menu if my memory is correct; I'm offline at the moment) in DFII.

Synthesis isn't my core are of expertise, so just wanted to give you some
pointers in (hopefully) the right direction.

Regards,

Andrew.

On Wed, 30 Jun 2004 12:37:50 -0400, "Jason D. Bakos"
<jbakos@cREMOVEs.pitMEt.edu> wrote:

Hi everyone!

We currently use the ICFB suite (Viruoso/Analog Artist) to do extensive
schematic/layout design as well as simulation. However, I was wondering
if there was any mechanism within these tools to perform any of the
following:

- synthesis flow from VHDL, or
- assuming synthesis was performed with a third-party tool, use the
Cadence tools to represent particular components with a netlist (such as
an EDF-formatted netlist) for purposes of simulation in Analog Artist.

I assume you can do the latter task using the Hierarchy Editor, but I
haven't been able to try this as yet.

Also, assuming the ICFB tools can do VHDL synthesis, is there a way to
define custom technology libraries using specified standard
logic/memory/driver cells?

Thanks in advance,
-Jason

--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd