Synthesis question

L

Linjia

Guest
Hi, buddies,

I use Design_Compiler to synthesize my SystemC program. There are some
warning message as following,
"Warning: /users/ce/ub/lhuang/graal/bdfu/work/scc_cache/bdfu_ctrl.v:77:
'left' is being read, but does not appear in the sensitivity list of
the block. (ELAB-292)"
Is it serious when synthesizing? Do I need add all of signals that are
used in process in the sensitive list?
Thanx a lot!

Linjia
 

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