Synthese of to_integer

O

Olaf Petzold

Guest
Hi,

this time I've got an error on (xst) synthese:

ERROR:HDLParsers:808 - Line 128. to_integer can not have such
operands in this context.


inside the package la_pkg:
----8<---
constant LA_HIT_LENGTH : positive := 8;

type trigger_cond_t is
record
...
length_value : std_logic_vector(LA_HIT_LENGTH-1 downto 0);
end record;

inside vhdl file:
---8<---
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.la_pkg.all;

signal tlc_ce : std_logic;
signal hit_length_match : std_logic;
signal cond : trigger_cond_t;
...

tlc : process (...) is
constant N : natural := cond.length_value'high + 1; -- aka
-- LA_HIT_LENGTH
variable i : natural range 0 to 2**N-1;
variable m_down : boolean;
begin
if (rst_triggers = RESET_ACTIVE) then
i := 0;
m_down := false;
hit_length_match <= '0';
elsif (tlc_ce = '0') then -- asynchronous reload
i := to_integer(unsigned(cond.length_value)); -- LINE 128
elsif rising_edge(clk) then
if (tlc_ce = '1') and not m_down then
if (i = 0) then
m_down := true;
hit_length_match <= '1';
else
i := i - 1;
end if;
end if;
end if;
end process;
--->8----

Well, I though the ieee.numeric_std.all stuff doesn't make Problems on
synthese? What for a context? -> synthese? Is this a general Problem
on using integers and theire conversation?

How can I get this trough the synthesis?

Thanks and regards,
Olaf
 
Von Olaf Petzold:

Hi,

this time I've got an error on (xst) synthese:

ERROR:HDLParsers:808 - Line 128. to_integer can not have such
operands in this context.
Click to expand...
No idea, but...

inside the package la_pkg:
----8<---
constant LA_HIT_LENGTH : positive := 8;

type trigger_cond_t is
record
...
length_value : std_logic_vector(LA_HIT_LENGTH-1 downto 0);
end record;

inside vhdl file:
---8<---
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.la_pkg.all;

signal tlc_ce : std_logic;
signal hit_length_match : std_logic;
signal cond : trigger_cond_t;
...

tlc : process (...) is
constant N : natural := cond.length_value'high + 1; -- aka
-- LA_HIT_LENGTH
variable i : natural range 0 to 2**N-1;
variable i: unsigned(N-1 downto 0);
variable m_down : boolean;
begin
if (rst_triggers = RESET_ACTIVE) then
i := 0;
i := (others => '0');
m_down := false;
hit_length_match <= '0';
elsif (tlc_ce = '0') then -- asynchronous reload
i := to_integer(unsigned(cond.length_value)); -- LINE 128
i := unsigned(cond.length_value);
elsif rising_edge(clk) then
if (tlc_ce = '1') and not m_down then
if (i = 0) then
m_down := true;
hit_length_match <= '1';
else
i := i - 1;
end if;
end if;
end if;
end process;
--->8----

Well, I though the ieee.numeric_std.all stuff doesn't make Problems on
synthese? What for a context? -> synthese? Is this a general Problem
on using integers and theire conversation?

How can I get this trough the synthesis?
Click to expand...
HTH

Eike
 
Olaf Petzold schrieb:

i := to_integer(unsigned(cond.length_value)); -- LINE 128
I would say you use a dot and not a comma, between the to parameters.
Click to expand...

Bye Tom
 
Thomas Reinemann schrieb:
Olaf Petzold schrieb:


i := to_integer(unsigned(cond.length_value)); -- LINE 128

I would say you use a dot and not a comma, between the to parameters.

Bye Tom
Click to expand...
cond.length_value (cond dot length_value) is correct since I want
access to a record.

function TO_INTEGER (ARG: UNSIGNED) return NATURAL seems to be the bad
part here.

Thanks and regards
Olaf
 
Olaf Petzold wrote:

ERROR:HDLParsers:808 - Line 128. to_integer can not have such operands
in this context.

signal cond : trigger_cond_t;
....
i := to_integer(unsigned(cond.length_value)); -- LINE 128
Click to expand...
Maybe it would be a good idea, to post the definition of trigger_cond_t.

Ralf
 
Ralf Hildebrandt schrieb:
Olaf Petzold wrote:

ERROR:HDLParsers:808 - Line 128. to_integer can not have such
operands in this context.


signal cond : trigger_cond_t;

...

i := to_integer(unsigned(cond.length_value)); -- LINE 128


Maybe it would be a good idea, to post the definition of trigger_cond_t.
Click to expand...
These are the first lines of the package:

----8<---
constant LA_HIT_LENGTH : positive := 8;

type trigger_cond_t is
record
...
length_value : std_logic_vector(LA_HIT_LENGTH-1 downto 0);
end record;
...

inside vhdl file:
---8<---
....
signal tlc_ce : std_logic;
signal hit_length_match : std_logic;
signal cond : trigger_cond_t;
....

Thanks and regards,
Olaf
 
Olaf Petzold wrote:

ERROR:HDLParsers:808 - Line 128. to_integer can not have such
operands in this context.

i := to_integer(unsigned(cond.length_value)); -- LINE 128

constant LA_HIT_LENGTH : positive := 8;

type trigger_cond_t is
record
...
length_value : std_logic_vector(LA_HIT_LENGTH-1 downto 0);
end record;
Click to expand...
What, if the synthesis tool has problems with structures? Try to copy
cond.length_value to a dummy variable of the same type and then convert
it to integer while copying it to i.
I am just guessing.

Ralf
 
What, if the synthesis tool has problems with structures? Try to copy
cond.length_value to a dummy variable of the same type and then convert
it to integer while copying it to i.
I am just guessing.
Click to expand...
It seems so (xst 7.1.04i):

tlc : process (tlc_ce, clk, cond.length_value, rst_triggers) is
constant N : natural := cond.length_value'high + 1; -- aka
LA_HIT_LENGTH
variable i : natural range 0 to 2**N-1;
variable length : unsigned(cond.length_value'range);
variable m_down : boolean;
begin
if (rst_triggers = RESET_ACTIVE) then
i := 0;
m_down := false;
hit_length_match <= '0';
elsif (tlc_ce = '0') then -- asynchronous reload
length := unsigned(cond.length_value);
i := to_integer(length); -- LINE 234
elsif rising_edge(clk) then
...

ERROR:HDLParsers:808 - Line 234. to_integer can not have such operands
in this context.

Great! xilinx, very (un)cool.

Regards,
Olaf
 
Well, it seems to be a really specific problem. Other source using
to_integer works!

Regards,
Olaf
 
Olaf Petzold wrote:

It seems so (xst 7.1.04i):

tlc : process (tlc_ce, clk, cond.length_value, rst_triggers) is
constant N : natural := cond.length_value'high + 1; -- aka
LA_HIT_LENGTH
variable i : natural range 0 to 2**N-1;
variable length : unsigned(cond.length_value'range);
variable m_down : boolean;
begin
if (rst_triggers = RESET_ACTIVE) then
i := 0;
m_down := false;
hit_length_match <= '0';
elsif (tlc_ce = '0') then -- asynchronous reload
length := unsigned(cond.length_value);
i := to_integer(length); -- LINE 234
elsif rising_edge(clk) then
...

ERROR:HDLParsers:808 - Line 234. to_integer can not have such operands
in this context.

Great! xilinx, very (un)cool.
Click to expand...
Are you using numeric_std or std_logic_arith?

-a
 
Andy Peters schrieb:
Olaf Petzold wrote:


It seems so (xst 7.1.04i):

tlc : process (tlc_ce, clk, cond.length_value, rst_triggers) is
constant N : natural := cond.length_value'high + 1; -- aka
LA_HIT_LENGTH
variable i : natural range 0 to 2**N-1;
variable length : unsigned(cond.length_value'range);
variable m_down : boolean;
begin
if (rst_triggers = RESET_ACTIVE) then
i := 0;
m_down := false;
hit_length_match <= '0';
elsif (tlc_ce = '0') then -- asynchronous reload
length := unsigned(cond.length_value);
i := to_integer(length); -- LINE 234
elsif rising_edge(clk) then
...

ERROR:HDLParsers:808 - Line 234. to_integer can not have such operands
in this context.

Great! xilinx, very (un)cool.


Are you using numeric_std or std_logic_arith?
Click to expand...
I'm using numeric_std.

Olaf
 
now, it is really curious:

----8<----
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

package pkg_trigger is
...
type trigger_cond_t is
record
....
length_value : unsigned(LA_HIT_LENGTH-1 downto 0);
end record;
end package pkg_trigger;

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.pkg_trigger.all;

entity trigger is
generic (
BIT_WIDTH : positive := 16;
RESET_ACTIVE : std_logic := '1');
port (
clk : in std_logic;
reset : in std_logic;
...
cond : in trigger_cond_t;
end entity;

architecture behavioral of trigger is
....
signal hit_length_match : std_logic;
signal tlc_ce : std_logic;
-- pragma synthesis_off
signal vsim_tlc_count : natural;
-- pragma synthesis_on

begin
tlc : process (tlc_ce, clk, cond.length_value, rst_triggers) is
variable i : unsigned(cond.length_value'range);
variable m_down : boolean;
begin
if (rst_triggers = RESET_ACTIVE) then
i := (others => '0');
m_down := false;
hit_length_match <= '0';
elsif (tlc_ce = '0') then
i := cond.length_value; -- LINE 216
elsif rising_edge(clk) then
if (tlc_ce = '1') and not m_down then
if (i = 0) then
m_down := true;
hit_length_match <= '1';
else
i := i - 1;
end if;
end if;
-- pragma synthesis_off
vsim_tlc_count <= to_integer(i);
-- pragma synthesis_on
end if;
end process;


I've got on xst synthese:

ERROR:HDLParsers:800 Line 216. Type of i is incompatible with type of ..
ERROR: XST failed

yep, that's all What's going one here? No Problems on simulation. It's
a simple loadable counter.

Thanks
Olaf
 
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