syntax question

[krby_xtrm]

what that this syntax mean: S1_S0 is 2-bit std_logic_Vector, s1 and s0
is std_logic...
S1_S0 <= (s1, s0);

this one: hit is boolean
HIT <= (ADI (31 downto 24) = BA);

 

[jtw]

Homework problem?

Hint on the second:

HIT <= true when ADI (31 downto 24) = BA else
false;

JTW


"krby_xtrm" <kerby.martino@gmail.com> wrote in message
news:1131767348.527530.144760@z14g2000cwz.googlegroups.com...

what that this syntax mean: S1_S0 is 2-bit std_logic_Vector, s1 and s0
is std_logic...
S1_S0 <= (s1, s0);

this one: hit is boolean
HIT <= (ADI (31 downto 24) = BA);

 

[Ralf Hildebrandt]

krby_xtrm wrote:

what that this syntax mean: S1_S0 is 2-bit std_logic_Vector, s1 and s0
is std_logic...
S1_S0 <= (s1, s0);

Do you mean:

s1_s0 <= s1 & s0; -- logic concatenation

This is equal to:

s1_s0(1)<=s1;
s1_s0(0)<=s0;

Ralf