Synplify compile points keep getting resynthesized

[null]

Hi all,

For some reason synplify is resynthesizing my compile points even thoug
the compile points' rtl have not changed and compile points' sdc files ar
the same as the initial compile. Synplify is saying "mapper or mappin
options have changed" for all compile points in the design. I have no
changed the mapping/synthesis options in the project file. Because I wa
doing some copying (I am working on a copy of the initial compile databas
and simply updating the rtl file list), the time stamp of the sdc files an
compile point implementation folders have changed. Would this cause
resynthesis?


Thanks,
NuLL

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