Synopsys Design Analyzer in command prompt

[Kenneth Brun Nielsen]

Hi all,

This might not be the best group, but I was not able to find a better one...

Does anyone knows whether it is possible to Synthesize a VHDL design with
Synopsys design_analyzer from a UNIX command prompt. I need to do it
remotely (SSH) without any graphical "connection"?

Thanks in advance.

/Kenneth

 

[Tim Hubberstey]

Kenneth Brun Nielsen wrote:

Hi all,

This might not be the best group, but I was not able to find a better one...

Does anyone knows whether it is possible to Synthesize a VHDL design with
Synopsys design_analyzer from a UNIX command prompt. I need to do it
remotely (SSH) without any graphical "connection"?

I haven't used Synopsys for a few years, but it certainly used to be
possible. In fact, it used to be the only way available to run it. The
command was 'dc_shell' but, now that Synopsys uses Tcl as the script
language, it might be something else (tcl_shell?).

Synopsys' documentation is extensive so I'm sure the answer is in there.
The help system was called SOLD (Synopsys OnLine Documentation) and it
came on at least two separate CDs.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com

 

[Kenneth Brun Nielsen]

"topgun" <sanjeevvr@yahoo.com> skrev i en meddelelse
news:1115626835.804304.225570@g14g2000cwa.googlegroups.com...

Hi

if you need to run design analyzer in command prompt you can use the
following
two commands depending on your scripts

dc_shell -f script1

dc_shell-t -f script1.tcl (if you are using a tcl version of the
synopsys script).....

(...)

Thank you very much, Topgun. You just saved my day!

/Kenneth

 

[Kenneth Brun Nielsen]

And another quick question: I used to report to the display - how do I
change that, so the report is printed to a file? I guess some parameter
should be added to the "report"-command.

TIA.

/KBN

 

[Kai Harrekilde-Petersen]

"Kenneth Brun Nielsen" <news@_FJERNES_brun.dk> writes:

And another quick question: I used to report to the display - how do I
change that, so the report is printed to a file? I guess some parameter
should be added to the "report"-command.

report > filename

ISTR that you can also use

report >> filename

to get data appended to the file.


Kai
--
Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>

 

[Kenneth Brun Nielsen]

"Kai Harrekilde-Petersen" <khp@harrekilde.dk> skrev i en meddelelse
news:ur7ggdr4l.fsf@harrekilde.dk...

"Kenneth Brun Nielsen" <news@_FJERNES_brun.dk> writes:

And another quick question: I used to report to the display - how do I
change that, so the report is printed to a file? I guess some parameter
should be added to the "report"-command.

report > filename

ISTR that you can also use

report >> filename

to get data appended to the file.

OK. That sounds feasible. Thanks.

/KBN

 

[topgun]

Hi

if you need to run design analyzer in command prompt you can use the
following
two commands depending on your scripts

dc_shell -f script1

dc_shell-t -f script1.tcl (if you are using a tcl version of the
synopsys script).....

One of the ways for you to obtain the dc script is save the
transcript when you run the tool graphically.....

basic dc script template looks like the following..

**************************************************************
read -format verilog sample_rtl.v
uniquify
ungroup -all -flatten
compile -map_effort medium
ungroup -all -flatten
write -format verilog -hierarchy -output sample_netlist.v
******************************************************************