Guest
Hi folks,
I have a basic doubt in digital design, Suppose if I have a 20mhz clock
domain A and say a 50Mhz another clock domain B,Clock domain B sents an
interupt to domain A which operates of 20Mhz, How should i synchonize
this signal to acknowledge the interupt ?
If asynchrnous , then we can use hand shake signal ? but how it wil b
in synchrnous system ?
1) Can i use a fifo and give clk A as reference clk to Fifo ?
2) Shld i parallel or pipeline any block , if so with refernce to which
clock?
what components wil the h/w have for synchronizer ?
Can someone help in this doubt ?
Regards,
Ali
I have a basic doubt in digital design, Suppose if I have a 20mhz clock
domain A and say a 50Mhz another clock domain B,Clock domain B sents an
interupt to domain A which operates of 20Mhz, How should i synchonize
this signal to acknowledge the interupt ?
If asynchrnous , then we can use hand shake signal ? but how it wil b
in synchrnous system ?
1) Can i use a fifo and give clk A as reference clk to Fifo ?
2) Shld i parallel or pipeline any block , if so with refernce to which
clock?
what components wil the h/w have for synchronizer ?
Can someone help in this doubt ?
Regards,
Ali