Switching to numeric_std

[Brad Smallridge]

According to a suggestion from a previous posting by Jonathan Bromley (July
14 Re signed binary Massi), I am trying to convert some VHDL to numeric_std.

I have one spot that uses conv_integer, which I suppose needs to be
rewritten as to_integer([un]signed(std_logic_vector)).

Another spot, I infer an adder with index <= index + 1 ; where index is also
std_logic_vector. The numeric_std library didn't like this.

So what happens here? Do I need to convert to integer, add, and then after
the addition, convert it back to std_logic_vector? If so, what does the code
look like?

What other compatibility issues will I encounter?

I use ModelSimXE and have had issues of variables not being easily
displayable in the Wave window so I use std_logic_vector. Will this
conversion to numeric_std be a problem?

Brad Smallridge
aivision

 

[Mike Treseler]

Brad Smallridge wrote:

According to a suggestion from a previous posting by Jonathan Bromley (July
14 Re signed binary Massi), I am trying to convert some VHDL to numeric_std.

good idea.

I have one spot that uses conv_integer, which I suppose needs to be
rewritten as to_integer([un]signed(std_logic_vector)).

declare those registers as unsigned
and you are left with
to_integer(my_vec)

Another spot, I infer an adder with index <= index + 1 ; where index is also
std_logic_vector. The numeric_std library didn't like this.

declare those registers as unsigned

-- Mike Treseler

 

[Ralf Hildebrandt]

Brad Smallridge wrote:

I have one spot that uses conv_integer, which I suppose needs to be
rewritten as to_integer([un]signed(std_logic_vector)).

Right. One has to write more, but the declaration of signed or unsigned
is necessary.

Another spot, I infer an adder with index <= index + 1 ; where index is also
std_logic_vector. The numeric_std library didn't like this.

It does not like this, because arithmetics should not be done as long as
it is ambiguous what kind of value the signal is (signed or unsigned).
Well, for the addition there is no problem, but comparisons there is one.

As Mike already has suggested to not use std_ulogic_vector as type for
the signal index but signed or unsigned makes life easier. If this is
not an option you have to convert it:

index <= std_logic_vector( unsigned(index) + 1 );

Numeric_std defines an addition of (un)signed with integer.


Ralf

 

[Martin Thompson]

"Brad Smallridge" <bradsmallridge@dslextreme.com> writes:

According to a suggestion from a previous posting by Jonathan Bromley (July
14 Re signed binary Massi), I am trying to convert some VHDL to numeric_std.

As others have said - this is a good move

I have one spot that uses conv_integer, which I suppose needs to be
rewritten as to_integer([un]signed(std_logic_vector)).

Another spot, I infer an adder with index <= index + 1 ; where index is also
std_logic_vector. The numeric_std library didn't like this.

If I have signals/variables which represent numbers (rather than
arbitrary collections of bits), then I declare them as
either integers, or [un]signed. That way you can do maths on them
without messing about with conversion functions and casts.

So what happens here? Do I need to convert to integer, add, and then after
the addition, convert it back to std_logic_vector? If so, what does the code
look like?

If you don't want to change the types then you can do

index <= std_logic_vector(unsigned(index)+1);

What other compatibility issues will I encounter?

No help there I'm afraid - I have never had to *convert* any code... maybe
I'm young enough to have used numeric_std all the time. I once saw
someone "got" by std_logic_arith in my "formative years", and
never went near it afterwards!

I use ModelSimXE and have had issues of variables not being easily
displayable in the Wave window so I use std_logic_vector. Will this
conversion to numeric_std be a problem?

Shouldn't be - the issue of variable not displaying is not to do with
what type they are, just that they are variables. You have to add
them to the wave window before running the sim, otherwise they don't
get logged (assuming XE works the same as the AE and EE license we
have here).

HTH!
Martin

--
martin.j.thompson@trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.trw.com/conekt

 

[Andy]

If index is only used to index an array, make index a subtype of
integer, and there's no conversion necessary, either in the arithmetic
or in the indexing.

You have to define it with an explicit range that determines the number
of bits (i.e. and 8 bit counter is natural range 0 to 255). Then
remember that you have to roll it over, it will not rollover itself.

Andy