switch design on fpga

[hema]

hiiii,

In case of designing the switch controller on FPGA ,how to resolve the
contention when all the input buffers(FIFO) try out for the same output
FIFO????

regards,
hema.

 

[KJ]

"hema" <ashu_19_1980@yahoo.com> wrote in message
news:1160386858.612430.213030@m7g2000cwm.googlegroups.com...

hiiii,

In case of designing the switch controller on FPGA ,how to resolve the
contention when all the input buffers(FIFO) try out for the same output
FIFO????

An arbitrator.

KJ