D
David Rivkin, PhD, CESE
Guest
Summer Internships At SciEssence, LLC We are looking for Summer Interns to
show off their technical skills and knowledge of the following
technologies, as well as their ability to work in a 21st Century
Engineering Firm under GPES management and telecommuting. The top 2 Interns
will be offered the opportunity to work on exciting projects with the top
scientists and engineers in the world, at SciEssence.
Image Analysis Software Engineering Internship (Graduate Degree Required)
This simple test of your image analysis and coding knowledge: Using
specifications and background that will be provided to you, design (UML)
and code image analysis in Java. A detailed specification will be provided
to you upon completion of our NDA. You will be responsible for: Reporting
your design specifications, issues and status reports to your Internship
Manager. Coding Java for image analysis of quantum mechanical effects as
needed to implement the specification.
Perl Software Engineering Internship:
This simple test of your Perl & PostgreSQL knowledge: Add support to
SQLedger for ebXML transactions coming via email (Qmail) with script for
qmail initiation. You will be responsible for: Reporting your design
specifications, issues and status reports to your Internship Manager.
Creating design specification for review prior to coding for ebXML support.
Coding the Perl as needed.
PHP Software Engineering Internship:
This simple test of your PHP, HTML & PostgreSQL knowledge: Port GPES from
ASP/SQLServer/MSOffice to PHP/PostgreSQL/XHTML, you may use ASP2PHP to get
started. You will be responsible for: Reporting your design specifications,
issues and status reports to your Internship Manager. Conversion of ASP to
PHP Conversion of any SQLserver specific code to PostgreSQL code Convert
Word/Excel report output code to output HTML (or PDF depending on details)
Coding the PHP as needed.
Firmware Engineering Internship:
This simple test of your assembly programming knowledge: You will be
responsible for: Reporting your design specifications, issues and status
reports to your Internship Manager. Creating design specification for
review prior to coding. Coding of approximately 200 lines of ASM with
documentation. Example ASM code will be provided.
Java/SCSI Software Engineering Internship:
This simple test of your Java, XML and SCSI/ATAPI knowledge: Develope a Java
applications for BSD, Solaris, Linux, Windows (98/2K/XP), and MacOS using
XML datafiles that describe for SCSI/ATAPI packet commands to be sent to
devices and replies reported. You will be responsible for: Reporting your
design specifications, issues and status reports to your Internship
Manager. An XML Schema will be provided which defines the XML files to be
processed and will support any number and type of SCSI/ATAPI packet command
and reply definition for a device. Some assistance will be available.
Design a flexible UI for the support of the XML data display. Design
specifications for the Java code. Coding the Java application to run on any
platform that supports SCSI and/or ATAPI (via SCSI emulaton drivers eg. sg
driver on *nix)
VHDL/Verilog Engineering Internship:
This simple test of your VHDL/Verilog knowledge: Using existing OpenSource
and proprietary code, develop VHDL/Verilog to implement a ATAPI device. A
detailed specification will be provided to you upon completion of our NDA.
You will be responsible for: Reporting your design specifications, issues
and status reports to your Internship Manager. Coding VHDL/Verilog as
needed to implement the specification.
PCB/EDA Hardware Engineering Internship:
This simple test of your PCB desig knowledge: Using existing specification
and documented schematic, enter into Eagle EDA the schematic with defined
modifications and generate a board file to specifications that will be
provided. A detailed specification will be provided to you upon completion
of our NDA. You will be responsible for: Reporting your design
specifications, issues and status reports to your Internship Manager. PCB
schematics and layout as needed to implement the specification.
All internships require maintaining status reports to the internship manager
Testing and Validation of the systems. A final report (with documentation)
of your project.
Internships will be evaluated based on: Quality of work including internal
documentation for any that you modify Testing protocol completeness and
eligance Quality of report and documentation Compliance to engineering
standards of SciEssence (will be provided) Task management and status
maintainance Please contact internship@sciessence.com with you interest
before starting as only a limited number of interns will be accepted based
on resume.
Resumes must be in IEEE Portfolio Resume format ONLY.
Best of luck!
Engineering Dept.
SciEssence, LLC
show off their technical skills and knowledge of the following
technologies, as well as their ability to work in a 21st Century
Engineering Firm under GPES management and telecommuting. The top 2 Interns
will be offered the opportunity to work on exciting projects with the top
scientists and engineers in the world, at SciEssence.
Image Analysis Software Engineering Internship (Graduate Degree Required)
This simple test of your image analysis and coding knowledge: Using
specifications and background that will be provided to you, design (UML)
and code image analysis in Java. A detailed specification will be provided
to you upon completion of our NDA. You will be responsible for: Reporting
your design specifications, issues and status reports to your Internship
Manager. Coding Java for image analysis of quantum mechanical effects as
needed to implement the specification.
Perl Software Engineering Internship:
This simple test of your Perl & PostgreSQL knowledge: Add support to
SQLedger for ebXML transactions coming via email (Qmail) with script for
qmail initiation. You will be responsible for: Reporting your design
specifications, issues and status reports to your Internship Manager.
Creating design specification for review prior to coding for ebXML support.
Coding the Perl as needed.
PHP Software Engineering Internship:
This simple test of your PHP, HTML & PostgreSQL knowledge: Port GPES from
ASP/SQLServer/MSOffice to PHP/PostgreSQL/XHTML, you may use ASP2PHP to get
started. You will be responsible for: Reporting your design specifications,
issues and status reports to your Internship Manager. Conversion of ASP to
PHP Conversion of any SQLserver specific code to PostgreSQL code Convert
Word/Excel report output code to output HTML (or PDF depending on details)
Coding the PHP as needed.
Firmware Engineering Internship:
This simple test of your assembly programming knowledge: You will be
responsible for: Reporting your design specifications, issues and status
reports to your Internship Manager. Creating design specification for
review prior to coding. Coding of approximately 200 lines of ASM with
documentation. Example ASM code will be provided.
Java/SCSI Software Engineering Internship:
This simple test of your Java, XML and SCSI/ATAPI knowledge: Develope a Java
applications for BSD, Solaris, Linux, Windows (98/2K/XP), and MacOS using
XML datafiles that describe for SCSI/ATAPI packet commands to be sent to
devices and replies reported. You will be responsible for: Reporting your
design specifications, issues and status reports to your Internship
Manager. An XML Schema will be provided which defines the XML files to be
processed and will support any number and type of SCSI/ATAPI packet command
and reply definition for a device. Some assistance will be available.
Design a flexible UI for the support of the XML data display. Design
specifications for the Java code. Coding the Java application to run on any
platform that supports SCSI and/or ATAPI (via SCSI emulaton drivers eg. sg
driver on *nix)
VHDL/Verilog Engineering Internship:
This simple test of your VHDL/Verilog knowledge: Using existing OpenSource
and proprietary code, develop VHDL/Verilog to implement a ATAPI device. A
detailed specification will be provided to you upon completion of our NDA.
You will be responsible for: Reporting your design specifications, issues
and status reports to your Internship Manager. Coding VHDL/Verilog as
needed to implement the specification.
PCB/EDA Hardware Engineering Internship:
This simple test of your PCB desig knowledge: Using existing specification
and documented schematic, enter into Eagle EDA the schematic with defined
modifications and generate a board file to specifications that will be
provided. A detailed specification will be provided to you upon completion
of our NDA. You will be responsible for: Reporting your design
specifications, issues and status reports to your Internship Manager. PCB
schematics and layout as needed to implement the specification.
All internships require maintaining status reports to the internship manager
Testing and Validation of the systems. A final report (with documentation)
of your project.
Internships will be evaluated based on: Quality of work including internal
documentation for any that you modify Testing protocol completeness and
eligance Quality of report and documentation Compliance to engineering
standards of SciEssence (will be provided) Task management and status
maintainance Please contact internship@sciessence.com with you interest
before starting as only a limited number of interns will be accepted based
on resume.
Resumes must be in IEEE Portfolio Resume format ONLY.
Best of luck!
Engineering Dept.
SciEssence, LLC