Suitable FPGA architecture for Robots..

[Valli]

Hi,

What FPGA architecture is more suitable for the Robots, which involves
Pattern recognition (also partial configuration & more than 150k) and
lot of control logic generation.

Or, Is DSP prefferable for this?

Regards,
Valli.

 

[Mario Trams]

Valli wrote:

Hi,

What FPGA architecture is more suitable for the Robots, which involves
Pattern recognition (also partial configuration & more than 150k) and
lot of control logic generation.

Or, Is DSP prefferable for this?

Uhhh...
I think this is a wrong question as it appears that you are starting
at the wrong point with your robot design.

Instead of taking an FPGA or a DSP or whatever and building your
design around it, you should first determine how you want to
solve your specific problems and what solutions exist so far.

When you've got a broader view it will be much easier for you to
decide whether you need an FPGA, a DSP, a microcontroller, or a
mixture of all of them.

Regards,
Mario

 

[Antti Lukats]

sri_valli_design@hotmail.com (Valli) wrote in message news:<d9acfecb.0309042203.2cfa75dd@posting.google.com>...

Hi,

What FPGA architecture is more suitable for the Robots, which involves
Pattern recognition (also partial configuration & more than 150k) and
lot of control logic generation.

Or, Is DSP prefferable for this?

it depends what are the processing speed requirements, but I would say
its easier probably todo with DSP like TMS320LF2812 that would probably
be single chip solution. if you need prefer FPGA then you should get
pretty large one, XC2S300 or XC3S400 as minimum.

FPGA is better for DSP when its relativly small amount of calculations
but they must be carried out with extrem speed and in streaming fashion.
if you take a DSP then it can also do streaming DSP ops, but when you then
try to use the same DSP for control functions then various task switching
takes pretty much time away, and you must be very careful that real time
tasks get their time always - in FPGA such streaming runs 'in parallel'
so you can implement some DSP function in FPGA fabric, then a RISC controller
in FPGA and control program on that RISC and slow speed DSP functions possible
also. additionally you may implement a small addiotanal DSP core in FPGA.

all the above would make a very tight fit into XC2S300, so a bit larger
device would be recommended.

I had similar decision to make - using DSP processor for DSP and Control
or using DSP functions is FPGA and FPGA softcore RISC for control, my
choice was FPGA XC2S200 or S300 and is still fit, but Xilinx Microblaze
while being pretty small still takes considerable amount of FPGA (low cost
ones) so I dont have very much left for DSP (hopefully enough).

Altera NIOS could be used in 16 bit mode on Cyclone, but here I can not
say what the resource utilization is.

antti
http://www.graphord.com/forum

 

[Austin Lesea]

http://members.aol.com/ucimicromouse/index.htm

One robot that uses Spartan IIE FPGA....

Austin

Valli wrote:

Hi,

What FPGA architecture is more suitable for the Robots, which involves
Pattern recognition (also partial configuration & more than 150k) and
lot of control logic generation.

Or, Is DSP prefferable for this?

Regards,
Valli.

 

[Jesse Kempa]

You might inquire with these folks for their experience using
Nios/Cyclone for their combat robot (http://www.maccanikill.com) in
their recent "CycloneBot" project. If I remember correctly, there is a
Nios Cyclone dev board spinning around in there

That particular robot operates with two large motors, each driving a
single wheel (both wheels are 180 degrees apart). The CPU (and
associated FPGA logic) was used to control not only rotational speed,
but full movement (turning, fwd/reverse, side to side motion, etc.),
at varying speeds of rotation.

As for resource utilization: Nios by itself is pretty small. A 16-bit
Nios and basic peripheral set can use as little as 1500LEs for a
working system, but this will obviously go up if you want to use
features such as an SDRAM controller, accelerated multiplication,
caches, etc. Planning on 2000-2500LEs is reasonable for a 32-bit
Nios-based system. Again, its all dependant on which peripherals (and
how many of them) you need to design in.

Jesse Kempa
Altera Corp.
jkempa at altera dot com

I had similar decision to make - using DSP processor for DSP and Control
or using DSP functions is FPGA and FPGA softcore RISC for control, my
choice was FPGA XC2S200 or S300 and is still fit, but Xilinx Microblaze
while being pretty small still takes considerable amount of FPGA (low cost
ones) so I dont have very much left for DSP (hopefully enough).

Altera NIOS could be used in 16 bit mode on Cyclone, but here I can not
say what the resource utilization is.

antti
http://www.graphord.com/forum